Rob Clark 034fbcc3d8 drm/msm: hdmi phy 8960 phy pll ...

On downstream kernel the clk driver directly bangs hdmi phy registers.
For upstream kernel, we need to model this as a clock and register with
the clock framework.

Signed-off-by: Rob Clark <robdclark@gmail.com>

2014-08-04 11:55:28 -04:00

..

drm

drm/msm: hdmi phy 8960 phy pll

2014-08-04 11:55:28 -04:00

host1x

gpu: host1x: Rename internal functions for clarity

2014-06-05 23:10:30 +02:00

ipu-v3

Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux

2014-06-12 11:32:30 -07:00

vga

vgaarb: We can own non-decoded resources

2014-07-08 11:15:09 +10:00

Makefile

gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging

2014-06-04 11:06:52 +02:00