Evan Quan 0bcaefa6bf drm/amd/display: change the max clock level to 16 ...

As the gfxclk for SMU11 can have at most 16 discrete levels.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2019-01-25 16:15:35 -05:00

..

drm

drm/amd/display: change the max clock level to 16

2019-01-25 16:15:35 -05:00

host1x

gpu: host1x: Add Tegra194 support

2018-11-29 17:11:49 +01:00

ipu-v3

gpu: ipu-v3: image-convert: allow three rows or columns

2018-11-05 14:40:08 +01:00

vga

Merge tag 'drm-misc-next-2018-11-07' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

2018-11-19 10:40:33 +10:00

Makefile

…