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4f5a4d5df4
Commit f5fe12b1ea upstream.
In order to prevent aliasing attacks on the branch predictor,
invalidate the BTB or instruction cache on CPUs that are known to be
affected when taking an abort on a address that is outside of a user
task limit:
Cortex A8, A9, A12, A17, A73, A75: flush BTB.
Cortex A15, Brahma B15: invalidate icache.
If the IBE bit is not set, then there is little point to enabling the
workaround.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: David A. Long <dave.long@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
74 lines
1.9 KiB
C
74 lines
1.9 KiB
C
#ifndef __ASM_ARM_SYSTEM_MISC_H
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#define __ASM_ARM_SYSTEM_MISC_H
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#ifndef __ASSEMBLY__
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#include <linux/compiler.h>
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#include <linux/linkage.h>
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#include <linux/irqflags.h>
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#include <linux/reboot.h>
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#ifdef CONFIG_AMLOGIC_USER_FAULT
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#include <linux/ratelimit.h>
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#endif
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#include <linux/percpu.h>
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extern void cpu_init(void);
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void soft_restart(unsigned long);
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extern void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
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extern void (*arm_pm_idle)(void);
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#ifdef CONFIG_AMLOGIC_USER_FAULT
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extern void show_all_pfn(struct task_struct *task, struct pt_regs *regs);
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extern void show_vma(struct mm_struct *mm, unsigned long addr);
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#else
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static inline void show_all_pfn(struct task_struct *task, struct pt_regs *regs)
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{
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}
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static inline void show_vma(struct mm_struct *mm, unsigned long addr)
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{
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}
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#endif /* CONFIG_AMLOGIC_USER_FAULT */
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#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
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typedef void (*harden_branch_predictor_fn_t)(void);
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DECLARE_PER_CPU(harden_branch_predictor_fn_t, harden_branch_predictor_fn);
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static inline void harden_branch_predictor(void)
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{
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harden_branch_predictor_fn_t fn = per_cpu(harden_branch_predictor_fn,
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smp_processor_id());
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if (fn)
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fn();
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}
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#else
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#define harden_branch_predictor() do { } while (0)
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#endif
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#define UDBG_UNDEFINED (1 << 0)
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#define UDBG_SYSCALL (1 << 1)
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#define UDBG_BADABORT (1 << 2)
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#define UDBG_SEGV (1 << 3)
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#define UDBG_BUS (1 << 4)
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extern unsigned int user_debug;
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#ifdef CONFIG_AMLOGIC_USER_FAULT
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#define USR_FAULT_DBG_RATELIMIT_INTERVAL (5 * HZ)
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#define USR_FAULT_DBG_RATELIMIT_BURST 3
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#define user_fault_debug_ratelimited() \
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({ \
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static DEFINE_RATELIMIT_STATE(usr_fault_dgb_rs, \
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USR_FAULT_DBG_RATELIMIT_INTERVAL, \
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USR_FAULT_DBG_RATELIMIT_BURST); \
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bool __show_ratelimited = false; \
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if (__ratelimit(&usr_fault_dgb_rs)) \
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__show_ratelimited = true; \
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__show_ratelimited; \
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})
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#endif
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#endif /* !__ASSEMBLY__ */
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#endif /* __ASM_ARM_SYSTEM_MISC_H */
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