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commit be6577af0c upstream.
Stalls are quite frequent with recent kernels. I enabled
CONFIG_SOFTLOCKUP_DETECTOR and I caught the following stall:
watchdog: BUG: soft lockup - CPU#0 stuck for 22s! [cc1:22803]
CPU: 0 PID: 22803 Comm: cc1 Not tainted 5.6.17+ #3
Hardware name: 9000/800/rp3440
IAOQ[0]: d_alloc_parallel+0x384/0x688
IAOQ[1]: d_alloc_parallel+0x388/0x688
RP(r2): d_alloc_parallel+0x134/0x688
Backtrace:
[<000000004036974c>] __lookup_slow+0xa4/0x200
[<0000000040369fc8>] walk_component+0x288/0x458
[<000000004036a9a0>] path_lookupat+0x88/0x198
[<000000004036e748>] filename_lookup+0xa0/0x168
[<000000004036e95c>] user_path_at_empty+0x64/0x80
[<000000004035d93c>] vfs_statx+0x104/0x158
[<000000004035dfcc>] __do_sys_lstat64+0x44/0x80
[<000000004035e5a0>] sys_lstat64+0x20/0x38
[<0000000040180054>] syscall_exit+0x0/0x14
The code was stuck in this loop in d_alloc_parallel:
4037d414: 0e 00 10 dc ldd 0(r16),ret0
4037d418: c7 fc 5f ed bb,< ret0,1f,4037d414 <d_alloc_parallel+0x384>
4037d41c: 08 00 02 40 nop
This is the inner loop of bit_spin_lock which is called by hlist_bl_unlock in
d_alloc_parallel:
static inline void bit_spin_lock(int bitnum, unsigned long *addr)
{
/*
* Assuming the lock is uncontended, this never enters
* the body of the outer loop. If it is contended, then
* within the inner loop a non-atomic test is used to
* busywait with less bus contention for a good time to
* attempt to acquire the lock bit.
*/
preempt_disable();
#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)
while (unlikely(test_and_set_bit_lock(bitnum, addr))) {
preempt_enable();
do {
cpu_relax();
} while (test_bit(bitnum, addr));
preempt_disable();
}
#endif
__acquire(bitlock);
}
After consideration, I realized that we must be losing bit unlocks.
Then, I noticed that we missed defining atomic64_set_release().
Adding this define fixes the stalls in bit operations.
Signed-off-by: Dave Anglin <dave.anglin@bell.net>
Cc: stable@vger.kernel.org
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
336 lines
8.1 KiB
C
336 lines
8.1 KiB
C
/* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
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* Copyright (C) 2006 Kyle McMartin <kyle@parisc-linux.org>
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*/
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#ifndef _ASM_PARISC_ATOMIC_H_
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#define _ASM_PARISC_ATOMIC_H_
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#include <linux/types.h>
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*
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* And probably incredibly slow on parisc. OTOH, we don't
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* have to write any serious assembly. prumpf
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*/
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#ifdef CONFIG_SMP
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#include <asm/spinlock.h>
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#include <asm/cache.h> /* we use L1_CACHE_BYTES */
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/* Use an array of spinlocks for our atomic_ts.
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* Hash function to index into a different SPINLOCK.
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* Since "a" is usually an address, use one spinlock per cacheline.
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*/
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# define ATOMIC_HASH_SIZE 4
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# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) (a))/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
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extern arch_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
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/* Can't use raw_spin_lock_irq because of #include problems, so
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* this is the substitute */
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#define _atomic_spin_lock_irqsave(l,f) do { \
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arch_spinlock_t *s = ATOMIC_HASH(l); \
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local_irq_save(f); \
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arch_spin_lock(s); \
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} while(0)
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#define _atomic_spin_unlock_irqrestore(l,f) do { \
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arch_spinlock_t *s = ATOMIC_HASH(l); \
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arch_spin_unlock(s); \
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local_irq_restore(f); \
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} while(0)
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#else
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# define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0)
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# define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
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#endif
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/*
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* Note that we need not lock read accesses - aligned word writes/reads
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* are atomic, so a reader never sees inconsistent values.
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*/
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static __inline__ void atomic_set(atomic_t *v, int i)
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{
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unsigned long flags;
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_atomic_spin_lock_irqsave(v, flags);
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v->counter = i;
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_atomic_spin_unlock_irqrestore(v, flags);
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}
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static __inline__ int atomic_read(const atomic_t *v)
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{
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return READ_ONCE((v)->counter);
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}
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/* exported interface */
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#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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/**
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* __atomic_add_unless - add unless the number is a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns the old value of @v.
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*/
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static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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for (;;) {
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if (unlikely(c == (u)))
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break;
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old = atomic_cmpxchg((v), c, c + (a));
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if (likely(old == c))
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break;
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c = old;
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}
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return c;
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}
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#define ATOMIC_OP(op, c_op) \
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static __inline__ void atomic_##op(int i, atomic_t *v) \
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{ \
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unsigned long flags; \
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\
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_atomic_spin_lock_irqsave(v, flags); \
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v->counter c_op i; \
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_atomic_spin_unlock_irqrestore(v, flags); \
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} \
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#define ATOMIC_OP_RETURN(op, c_op) \
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static __inline__ int atomic_##op##_return(int i, atomic_t *v) \
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{ \
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unsigned long flags; \
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int ret; \
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\
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_atomic_spin_lock_irqsave(v, flags); \
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ret = (v->counter c_op i); \
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_atomic_spin_unlock_irqrestore(v, flags); \
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\
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return ret; \
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}
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#define ATOMIC_FETCH_OP(op, c_op) \
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static __inline__ int atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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unsigned long flags; \
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int ret; \
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\
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_atomic_spin_lock_irqsave(v, flags); \
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ret = v->counter; \
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v->counter c_op i; \
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_atomic_spin_unlock_irqrestore(v, flags); \
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\
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return ret; \
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}
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#define ATOMIC_OPS(op, c_op) \
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ATOMIC_OP(op, c_op) \
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ATOMIC_OP_RETURN(op, c_op) \
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ATOMIC_FETCH_OP(op, c_op)
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ATOMIC_OPS(add, +=)
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ATOMIC_OPS(sub, -=)
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#undef ATOMIC_OPS
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#define ATOMIC_OPS(op, c_op) \
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ATOMIC_OP(op, c_op) \
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ATOMIC_FETCH_OP(op, c_op)
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ATOMIC_OPS(and, &=)
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ATOMIC_OPS(or, |=)
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ATOMIC_OPS(xor, ^=)
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#undef ATOMIC_OPS
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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#define atomic_inc(v) (atomic_add( 1,(v)))
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#define atomic_dec(v) (atomic_add( -1,(v)))
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#define atomic_inc_return(v) (atomic_add_return( 1,(v)))
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#define atomic_dec_return(v) (atomic_add_return( -1,(v)))
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#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
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/*
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
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#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
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#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
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#define ATOMIC_INIT(i) { (i) }
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#ifdef CONFIG_64BIT
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#define ATOMIC64_INIT(i) { (i) }
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#define ATOMIC64_OP(op, c_op) \
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static __inline__ void atomic64_##op(s64 i, atomic64_t *v) \
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{ \
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unsigned long flags; \
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\
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_atomic_spin_lock_irqsave(v, flags); \
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v->counter c_op i; \
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_atomic_spin_unlock_irqrestore(v, flags); \
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} \
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#define ATOMIC64_OP_RETURN(op, c_op) \
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static __inline__ s64 atomic64_##op##_return(s64 i, atomic64_t *v) \
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{ \
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unsigned long flags; \
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s64 ret; \
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\
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_atomic_spin_lock_irqsave(v, flags); \
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ret = (v->counter c_op i); \
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_atomic_spin_unlock_irqrestore(v, flags); \
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\
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return ret; \
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}
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#define ATOMIC64_FETCH_OP(op, c_op) \
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static __inline__ s64 atomic64_fetch_##op(s64 i, atomic64_t *v) \
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{ \
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unsigned long flags; \
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s64 ret; \
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\
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_atomic_spin_lock_irqsave(v, flags); \
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ret = v->counter; \
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v->counter c_op i; \
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_atomic_spin_unlock_irqrestore(v, flags); \
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\
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return ret; \
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}
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#define ATOMIC64_OPS(op, c_op) \
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ATOMIC64_OP(op, c_op) \
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ATOMIC64_OP_RETURN(op, c_op) \
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ATOMIC64_FETCH_OP(op, c_op)
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ATOMIC64_OPS(add, +=)
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ATOMIC64_OPS(sub, -=)
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#undef ATOMIC64_OPS
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#define ATOMIC64_OPS(op, c_op) \
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ATOMIC64_OP(op, c_op) \
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ATOMIC64_FETCH_OP(op, c_op)
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ATOMIC64_OPS(and, &=)
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ATOMIC64_OPS(or, |=)
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ATOMIC64_OPS(xor, ^=)
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#undef ATOMIC64_OPS
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#undef ATOMIC64_FETCH_OP
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#undef ATOMIC64_OP_RETURN
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#undef ATOMIC64_OP
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static __inline__ void
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atomic64_set(atomic64_t *v, s64 i)
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{
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unsigned long flags;
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_atomic_spin_lock_irqsave(v, flags);
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v->counter = i;
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_atomic_spin_unlock_irqrestore(v, flags);
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}
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#define atomic64_set_release(v, i) atomic64_set((v), (i))
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static __inline__ s64
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atomic64_read(const atomic64_t *v)
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{
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return ACCESS_ONCE((v)->counter);
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}
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#define atomic64_inc(v) (atomic64_add( 1,(v)))
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#define atomic64_dec(v) (atomic64_add( -1,(v)))
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#define atomic64_inc_return(v) (atomic64_add_return( 1,(v)))
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#define atomic64_dec_return(v) (atomic64_add_return( -1,(v)))
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#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
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#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
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#define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0)
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#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0)
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/* exported interface */
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#define atomic64_cmpxchg(v, o, n) \
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((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
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#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
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/**
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* atomic64_add_unless - add unless the number is a given value
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* @v: pointer of type atomic64_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns the old value of @v.
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*/
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static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
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{
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long c, old;
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c = atomic64_read(v);
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for (;;) {
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if (unlikely(c == (u)))
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break;
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old = atomic64_cmpxchg((v), c, c + (a));
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if (likely(old == c))
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break;
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c = old;
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}
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return c != (u);
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}
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
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/*
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* atomic64_dec_if_positive - decrement by 1 if old value positive
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* @v: pointer of type atomic_t
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*
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* The function returns the old value of *v minus 1, even if
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* the atomic variable, v, was not decremented.
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*/
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static inline long atomic64_dec_if_positive(atomic64_t *v)
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{
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long c, old, dec;
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c = atomic64_read(v);
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for (;;) {
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dec = c - 1;
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if (unlikely(dec < 0))
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break;
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old = atomic64_cmpxchg((v), c, dec);
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if (likely(old == c))
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break;
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c = old;
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}
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return dec;
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}
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#endif /* !CONFIG_64BIT */
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#endif /* _ASM_PARISC_ATOMIC_H_ */
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