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ace1297f72
Append interrupt controller and timer document for mmp. Updates documents for gpio and i2c. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
41 lines
1.5 KiB
Plaintext
41 lines
1.5 KiB
Plaintext
* Marvell MMP Interrupt controller
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Required properties:
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- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or
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"mrvl,mmp2-mux-intc"
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- reg : Address and length of the register set of the interrupt controller.
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If the interrupt controller is intc, address and length means the range
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of the whold interrupt controller. If the interrupt controller is mux-intc,
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address and length means one register. Since address of mux-intc is in the
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range of intc. mux-intc is secondary interrupt controller.
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- reg-names : Name of the register set of the interrupt controller. It's
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only required in mux-intc interrupt controller.
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- interrupts : Should be the port interrupt shared by mux interrupts. It's
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only required in mux-intc interrupt controller.
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- interrupt-controller : Identifies the node as an interrupt controller.
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- #interrupt-cells : Specifies the number of cells needed to encode an
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interrupt source.
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- mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt
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controller.
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- mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge
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detection first.
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Example:
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intc: interrupt-controller@d4282000 {
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compatible = "mrvl,mmp2-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xd4282000 0x1000>;
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mrvl,intc-nr-irqs = <64>;
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};
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intcmux4@d4282150 {
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compatible = "mrvl,mmp2-mux-intc";
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interrupts = <4>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x150 0x4>, <0x168 0x4>;
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reg-names = "mux status", "mux mask";
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mrvl,intc-nr-irqs = <2>;
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};
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