Rob Clark 8a264743b7 drm/msm: update generated headers ...

Resync from rnndb database, to pull in register defines for:
 * eDP
 * HDMI/HDCP
 * mdp4/mdp5 YUV support
 * mdp5 hw cursor support

Signed-off-by: Rob Clark <robdclark@gmail.com>

2015-02-01 15:30:33 -05:00

..

a2xx.xml.h

drm/msm: update generated headers

2015-02-01 15:30:33 -05:00

a3xx_gpu.c

drm/msm: Handle register offset differences between a3xx and a4xx

2014-11-16 14:27:39 -05:00

a3xx_gpu.h

drm/msm: update generated headers

2014-08-04 11:55:28 -04:00

a3xx.xml.h

drm/msm: update generated headers

2015-02-01 15:30:33 -05:00

a4xx_gpu.c

drm/msm: a4xx support for msm-drm

2014-11-16 14:27:40 -05:00

a4xx_gpu.h

drm/msm: a4xx support for msm-drm

2014-11-16 14:27:40 -05:00

a4xx.xml.h

drm/msm: update generated headers

2015-02-01 15:30:33 -05:00

adreno_common.xml.h

drm/msm: update generated headers

2015-02-01 15:30:33 -05:00

adreno_device.c

drm/msm: a4xx support for msm-drm

2014-11-16 14:27:40 -05:00

adreno_gpu.c

drm/msm: Deletion of unnecessary checks before the function call "release_firmware"

2014-12-17 10:59:49 -05:00

adreno_gpu.h

drm/msm: a4xx support for msm-drm

2014-11-16 14:27:40 -05:00

adreno_pm4.xml.h

drm/msm: update generated headers

2015-02-01 15:30:33 -05:00