Joy Cho 06b201e447 drm: exynos: Add a pixel clock to support Vu5A ...

To support Vu5A, a pixel clock, 33.9MHz is needed.
But, there is no exact hdmi phy table of exynos5422,
so the cloest table will be used as a workaround.

- Vu5A timing
Detailed mode: Clock 33.900 MHz, 476 mm x 268 mm
                800  844  932 1056 hborder 0
                480  483  489  535 vborder 0
               +hsync +vsync

Change-Id: I5a7c85cd58c5e3085b2fa85c7cae9e3618dd7abb

2018-04-20 10:00:18 +09:00

..

arm

Mali: update to r14p0

2016-10-11 00:19:23 -03:00

drm

drm: exynos: Add a pixel clock to support Vu5A

2018-04-20 10:00:18 +09:00

host1x

drm: const'ify ioctls table (v2)

2014-06-15 22:51:09 -03:00

vga

vgaarb: fix signal handling in vga_get()

2016-03-03 15:06:22 -08:00

Makefile

Samsung sources drop

2014-06-06 22:10:16 -03:00