Tobias Schramm 46060be6d8 clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll
Previously it was not possible to achieve clock rates of 24.576MHz and
22.5792MHz, which are commonly required core clocks for the i2s
peripheral of v3s based SoCs.

Add support for those clock rates through the audio pll's sigma-delta
modulator.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210218112001.479018-2-t.schramm@manjaro.org
2021-03-06 15:41:00 +08:00
2021-01-24 14:27:20 +01:00
2021-03-02 17:25:46 -07:00
2021-02-26 09:41:03 -08:00
2021-02-26 09:41:03 -08:00
2021-02-26 09:41:03 -08:00
2021-03-05 17:33:41 -08:00

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