José Roberto de Souza 4df4925b1b drm/i915/psr: Set DPCD PSR2 enable bit when needed ...

In the 2 eDP1.4a pannels tested set or not set bit have no effect
but is better set it and comply with specification.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180328223046.16125-9-jose.souza@intel.com

2018-03-30 10:18:11 -07:00

..

drm

drm/i915/psr: Set DPCD PSR2 enable bit when needed

2018-03-30 10:18:11 -07:00

host1x

gpu: host1x: Use IOMMU groups

2017-12-21 14:52:36 +01:00

ipu-v3

gpu: ipu-v3: allow to build with COMPILE_TEST

2017-12-19 12:49:11 +01:00

vga

vfs: do bulk POLL* -> EPOLL* replacement

2018-02-11 14:34:03 -08:00

Makefile

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