Files
linux/drivers
Zheng Yang 6d29956712 drm/rockchip: hdmi: correct 3328 hdmi phy power up timing
According to spec, TMDS driver should power up between PLL
power up and PLL lock.

There is an mistake of pdata en register, the real register
is reg2 bit0, not reg1 bit0.

Change-Id: I9d2b707cbcfd70b63f4a1a277a85f21b62643d2e
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2017-06-15 16:13:52 +08:00
..
2016-09-24 10:07:35 +02:00
2017-02-23 17:43:10 +01:00