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When switching sample rates, the clock settings are as follows: - For 48K, MCLK = 256fs = 256 * 48K = 12288K - For 16K, MCLK = 256fs = 256 * 16K = 4096K - For 8K, MCLK = 256fs = 256 * 8K = 2048K The `set_sysclk` function in the soc i2s_tdm controller does not actually perform `clk_set_rate`; it merely passes the parameters. The actual `clk_set_rate` is called during `i2s_tdm_hw_params`. However, `rk817_hw_params` performs `restart_clk_apll` inside, which sets the PLL parameters that do not match the MCLK, resulting in silence. To resolve this, clk_set_rate for the MCLK frequency should be called within the set_sysclk function. Signed-off-by: XiaoTan Luo <lxt@rock-chips.com> Change-Id: I3ad233542a5e8b16ae72f829e086a25f5be4a095
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.