Files
linux/drivers
Geert Uytterhoeven 83fab8ea62 clk: renesas: r8a7745: Fix LB clock divider
The CLK_TYPE_GEN2_LB clock type is meant for SoCs like R-Car H2, where
the LB clock divider depends on the value of the MD18 pin.

On RZ/G1E, the LB clock divider is fixed to 24.  Hence model the clock
as a fixed factor clock instead.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
2018-04-16 13:39:45 +02:00
..
2018-03-27 09:51:22 +02:00
2018-03-19 14:18:22 -05:00
2018-03-19 14:20:24 -05:00
2018-04-11 10:28:39 -07:00
2018-03-29 13:38:10 +03:00