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1104d84f0f
Re-init the I2C controller when an IRQ arrives with no I2C_INT_STATUS bits set to indicate why the interrupt was sent. Storms of such mystery interrupts are infrequently seen. Dump some more status when these interrupts arrive. Set an error for the current request and wake up the requester (rather than timing out the request or possibly silently ignoring the interrupts). If the I2C block is inside the DVC, also ACK the DVC I2C transfer done interrupt in the ISR error return path, as is done for the normal return path. Change-Id: I625b5c245aa8d83dbd7ff076b0fb5cc5682fffa1 Signed-off-by: Todd Poynor <toddpoynor@google.com>