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PD#170985: vlock: add pll adj stable check 1.add pll adj stable check avoid pll m adj 2.add vlock version info 3.add enc adj stable check avoid enc line adj repeate 4.add enc_max_line_switch default config 5.update pll default regmap setting 6.add pll adj value check avoid blink caused by big pll step adj 7.optimize enc pixel adj method 8.add support dts config vlock key parameters 9.move vlock process to start of vsync isr 10.optimize pll for txl vbyone Change-Id: Ie6e0aaacd23bfd7178db48e6f0d7bbec426b271f Signed-off-by: Dezhi Kong <dezhi.kong@amlogic.com>