Files
linux/arch
Dinh Nguyen ada9f5cad8 ARM: dts: socfpga: fix register entry for timer3 on Arria10
[ Upstream commit 0ff5a4812b ]

Fixes the register address for the timer3 entry on Arria10.

Fixes: 475dc86d08 ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC")
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2023-05-16 09:12:06 +09:00
..
2023-05-16 08:30:00 +09:00
2018-05-19 14:06:17 +02:00
2018-02-17 14:52:07 +01:00
2016-10-19 08:39:47 -07:00
2023-05-15 16:07:35 +09:00