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This reverts commit15a3adfe75. The backport of [1] relies on having [2] also backported. Having only one of the two results in a bogus hw->timing1 setting. If only [2] is backportet the 16 bit register value likely underflows resulting in a busy_wait_timeout of 0. Or if only [1] is applied the value likely overflows with chances of having last 16 LSBs all 0 which would then result in a busy_wait_timeout of 0 too. Both cases may lead to NAND data corruption, e.g. on a Colibri iMX7 setup this has been seen. [1] commit0fddf9ad06("mtd: rawnand: gpmi: Set WAIT_FOR_READY timeout based on program/erase times") [2] commit06781a5026("mtd: rawnand: gpmi: Fix setting busy timeout setting") Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>