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With FEAT_FGT, most bits in hfgwtr_el2 must be set to 1 to enable trapping of MSR writes of certain registers. However, there is a notable (and arguably curious) exception for nSMPRI_EL1 and nTPIDR2_EL0 which must be set to 1 to _disable_ trapping of the corresponding SME registers. Make sure to initialize hfgwtr_el2 in the pKVM init params accordingly to avoid accidentally enabling certain traps on hardware that supports FEAT_FGT and FEAT_SME. Bug: 282917063 Bug: 282993310 Change-Id: Ia96fa6856b4e7ef98b3cea4f03fcbc0ee03f10c5 Tested-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Quentin Perret <qperret@google.com>