Paulo Zanoni 4ffac6f06d drm/i915/gen9: fix the WM memory bandwidth WA for Y tiling cases ...

commit 2ef32dee97 upstream.

The previous spec version said "double Ytile planes minimum lines",
and I interpreted this as referring to what the spec calls "Y tile
minimum", but in fact it was referring to what the spec calls "Minimum
Scanlines for Y tile". I noticed that Mahesh Kumar had a different
interpretation, so I sent and email to the spec authors and got
clarification on the correct meaning. Also, BSpec was updated and
should be clear now.

Fixes: ee3d532fcb ("drm/i915/gen9: unconditionally apply the memory bandwidth WA")
Cc: stable@vger.kernel.org
Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1478636531-6081-1-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2017-01-12 11:39:38 +01:00

..

drm

drm/i915/gen9: fix the WM memory bandwidth WA for Y tiling cases

2017-01-12 11:39:38 +01:00

host1x

drm/tegra: dsi: Enhance runtime power management

2016-08-24 15:58:57 +02:00

ipu-v3

gpu: ipu-v3: Use ERR_CAST instead of ERR_PTR(PTR_ERR())

2016-10-17 08:21:53 +02:00

vga

vgaarbiter: rst-ifiy and polish kerneldoc

2016-08-16 18:49:56 +02:00

Makefile

gpu: host1x: Provide a proper struct bus_type

2015-01-27 10:09:14 +01:00