Swapnil Jakhade f9aec1648d dt-bindings: phy: cadence-torrent: Add clock IDs for derived and received refclk ...

Add clock IDs for derived and received reference clock output.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210922123735.21927-3-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

2021-10-26 16:36:23 +05:30

..

phy-am654-serdes.h

dt-bindings: phy: ti: Add dt binding documentation for SERDES in AM654x SoC

2019-04-17 14:13:18 +05:30

phy-cadence.h

dt-bindings: phy: cadence-torrent: Add clock IDs for derived and received refclk

2021-10-26 16:36:23 +05:30

phy-lantiq-vrx200-pcie.h

dt-bindings: phy: add binding for the Lantiq VRX200 and ARX300 PCIe PHYs

2019-08-23 09:40:46 +05:30

phy-ocelot-serdes.h

dt-bindings: phy: Update SERDES_MAX to be SERDES_MAX + 1

2018-10-22 19:27:14 -07:00

phy-pistachio-usb.h

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422

2019-06-05 17:37:15 +02:00

phy-qcom-qusb2.h

dt-bindings: phy-qcom-usb2: Add support to override tuning values

2018-05-20 21:51:31 +05:30

phy-ti.h

dt-bindings: phy: ti,phy-j721e-wiz: Add bindings for AM64 SERDES Wrapper

2021-03-17 12:02:40 +05:30

phy.h

dt-bindings: msm: dsi: document phy-type property for 7nm dsi phy

2021-08-07 11:48:37 -07:00