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6482f0d6af
commit 06d0bbc6d0 upstream.
Add a macro and some helper C functions for patching single asm
instructions.
The gas macro means we can do something like:
1: nop
patch_site 1b, patch__foo
Which is less visually distracting than defining a GLOBAL symbol at 1,
and also doesn't pollute the symbol table which can confuse eg. perf.
These are obviously similar to our existing feature sections, but are
not automatically patched based on CPU/MMU features, rather they are
designed to be manually patched by C code at some arbitrary point.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>
125 lines
3.8 KiB
C
125 lines
3.8 KiB
C
#ifndef _ASM_POWERPC_CODE_PATCHING_H
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#define _ASM_POWERPC_CODE_PATCHING_H
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/*
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* Copyright 2008, Michael Ellerman, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/types.h>
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#include <asm/ppc-opcode.h>
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/* Flags for create_branch:
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* "b" == create_branch(addr, target, 0);
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* "ba" == create_branch(addr, target, BRANCH_ABSOLUTE);
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* "bl" == create_branch(addr, target, BRANCH_SET_LINK);
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* "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK);
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*/
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#define BRANCH_SET_LINK 0x1
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#define BRANCH_ABSOLUTE 0x2
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unsigned int create_branch(const unsigned int *addr,
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unsigned long target, int flags);
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unsigned int create_cond_branch(const unsigned int *addr,
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unsigned long target, int flags);
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int patch_branch(unsigned int *addr, unsigned long target, int flags);
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int patch_instruction(unsigned int *addr, unsigned int instr);
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int patch_instruction_site(s32 *addr, unsigned int instr);
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int patch_branch_site(s32 *site, unsigned long target, int flags);
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int instr_is_relative_branch(unsigned int instr);
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int instr_is_relative_link_branch(unsigned int instr);
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int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr);
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unsigned long branch_target(const unsigned int *instr);
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unsigned int translate_branch(const unsigned int *dest,
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const unsigned int *src);
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#ifdef CONFIG_PPC_BOOK3E_64
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void __patch_exception(int exc, unsigned long addr);
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#define patch_exception(exc, name) do { \
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extern unsigned int name; \
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__patch_exception((exc), (unsigned long)&name); \
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} while (0)
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#endif
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#define OP_RT_RA_MASK 0xffff0000UL
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#define LIS_R2 0x3c020000UL
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#define ADDIS_R2_R12 0x3c4c0000UL
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#define ADDI_R2_R2 0x38420000UL
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static inline unsigned long ppc_function_entry(void *func)
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{
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#ifdef PPC64_ELF_ABI_v2
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u32 *insn = func;
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/*
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* A PPC64 ABIv2 function may have a local and a global entry
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* point. We need to use the local entry point when patching
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* functions, so identify and step over the global entry point
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* sequence.
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*
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* The global entry point sequence is always of the form:
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*
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* addis r2,r12,XXXX
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* addi r2,r2,XXXX
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*
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* A linker optimisation may convert the addis to lis:
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*
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* lis r2,XXXX
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* addi r2,r2,XXXX
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*/
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if ((((*insn & OP_RT_RA_MASK) == ADDIS_R2_R12) ||
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((*insn & OP_RT_RA_MASK) == LIS_R2)) &&
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((*(insn+1) & OP_RT_RA_MASK) == ADDI_R2_R2))
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return (unsigned long)(insn + 2);
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else
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return (unsigned long)func;
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#elif defined(PPC64_ELF_ABI_v1)
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/*
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* On PPC64 ABIv1 the function pointer actually points to the
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* function's descriptor. The first entry in the descriptor is the
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* address of the function text.
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*/
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return ((func_descr_t *)func)->entry;
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#else
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return (unsigned long)func;
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#endif
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}
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static inline unsigned long ppc_global_function_entry(void *func)
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{
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#ifdef PPC64_ELF_ABI_v2
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/* PPC64 ABIv2 the global entry point is at the address */
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return (unsigned long)func;
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#else
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/* All other cases there is no change vs ppc_function_entry() */
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return ppc_function_entry(func);
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#endif
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}
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#ifdef CONFIG_PPC64
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/*
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* Some instruction encodings commonly used in dynamic ftracing
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* and function live patching.
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*/
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/* This must match the definition of STK_GOT in <asm/ppc_asm.h> */
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#ifdef PPC64_ELF_ABI_v2
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#define R2_STACK_OFFSET 24
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#else
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#define R2_STACK_OFFSET 40
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#endif
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#define PPC_INST_LD_TOC (PPC_INST_LD | ___PPC_RT(__REG_R2) | \
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___PPC_RA(__REG_R1) | R2_STACK_OFFSET)
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/* usually preceded by a mflr r0 */
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#define PPC_INST_STD_LR (PPC_INST_STD | ___PPC_RS(__REG_R0) | \
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___PPC_RA(__REG_R1) | PPC_LR_STKOFF)
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#endif /* CONFIG_PPC64 */
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#endif /* _ASM_POWERPC_CODE_PATCHING_H */
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