Trek 8dd403e643 drm/amdgpu: Check for valid number of registers to read ...

[ Upstream commit 73d8e6c7b8 ]

Do not try to allocate any amount of memory requested by the user.
Instead limit it to 128 registers. Actually the longest series of
consecutive allowed registers are 48, mmGB_TILE_MODE0-31 and
mmGB_MACROTILE_MODE0-15 (0x2644-0x2673).

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111273
Signed-off-by: Trek <trek00@inbox.ru>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

2023-05-15 14:47:55 +09:00

..

drm

drm/amdgpu: Check for valid number of registers to read

2023-05-15 14:47:55 +09:00

host1x

drm/tegra: dsi: Enhance runtime power management

2016-08-24 15:58:57 +02:00

ipu-v3

gpu: ipu-v3: ipu-ic: Fix saturation bit offset in TPMEM

2023-05-15 14:02:39 +09:00

vga

vgaarbiter: rst-ifiy and polish kerneldoc

2016-08-16 18:49:56 +02:00

Makefile

gpu: host1x: Provide a proper struct bus_type

2015-01-27 10:09:14 +01:00