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ODROID-M2: New support for ODROID-M2

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Signed-off-by: Steve Jeong <steve@how2flow.net>
Change-Id: I379018ae50e6c2c43f0e53d9bc5986a2090d7818
This commit is contained in:
Steve Jeong
2024-03-07 08:12:33 +00:00
committed by Dongjin Kim
parent 58cea616e0
commit 47402619ff
10 changed files with 1483 additions and 1 deletions
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1
Android.bp
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@@ -28,6 +28,7 @@ cc_library_shared {
"wiringPi/odroidhc4.c",
"wiringPi/odroidm1.c",
"wiringPi/odroidm1s.c",
"wiringPi/odroidm2.c",
"wiringPi/drcSerial.c",
"wiringPi/mcp23s08.c",
"wiringPi/odroidn1.c",

71
gpio/readall.c
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@@ -67,7 +67,9 @@ static void doReadallExternal (void)
/*----------------------------------------------------------------------------*/
static const char *alts [] =
{
"IN", "OUT", "ALT1", "ALT2", "ALT3", "ALT4", "ALT5", "ALT6", "ALT7"
"IN", "OUT",
"ALT1", "ALT2", "ALT3", "ALT4", "ALT5", "ALT6", "ALT7",
"ALT8", "ALT9", "ALTa", "ALTb", "ALTc", "ALTd", "ALTe",
} ;
static const char *pupd [] =
@@ -714,6 +716,67 @@ static const char *physNamesOdroidM1S [64] =
NULL,NULL,NULL,
};
/*----------------------------------------------------------------------------*/
static const char *physNamesOdroidM2All [64] =
{
NULL,
" 3.3V", "5V ",
"I2C0_SDA", "5V ",
"I2C0_SCL", "GND(0V) ",
"GPIO0_D0", "UART1_TX",
" GND(0V)", "UART1_RX",
"GPIO3_D4", "GPIO3_B2",
"GPIO3_D5", "GND(0V) ",
"GPIO4_B3", "GPIO1_B2",
" 3.3V", "GPIO1_B3",
"SPI_MOSI", "GND(0V) ",
"SPI_MISO", "GPIO0_D4",
" SPI_CLK", "SPI_CS0 ",
" GND(0V)", "GPIO1_B4",
"I2C1_SDA", "I2C1_SCL",
"GPIO1_B7", "GND(0V) ",
"GPIO1_B6", "GPIO4_B4",
"GPIO3_D0", "GND(0V) ",
"GPIO3_C7", "GPIO4_B5",
"ADC.AIN4", "1V8 ",
" GND(0V)", "ADC.AIN5",
NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
NULL,NULL,NULL,
};
/*----------------------------------------------------------------------------*/
static const char *physNamesOdroidM2 [64] =
{
NULL,
" 3.3V", "5V ",
" SDA0", "5V ",
" SCL0", "0V ",
" IO0_D0", "UART.TX",
" 0V", "UART.RX",
" IO3_D4", "IO3_B2 ",
" IO3_D5", "0V ",
" IO4_B3", "IO1_B2 ",
" 3.3V", "IO1_B3 ",
"SPI.TXD", "0V ",
"SPI.RXD", "IO0_D4 ",
"SPI.CLK", "SPI.CS0",
" 0V", "IO1_B4 ",
" SDA1", "SCL1 ",
" IO1_B7", "0V ",
" IO1_B6", "IO4_B4 ",
" IO3_D0", "0V ",
" IO3_C7", "IO4_B5 ",
" AIN4", "1V8 ",
" 0V", "AIN5 ",
NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
NULL,NULL,NULL,
};
/*----------------------------------------------------------------------------*/
static void readallPhys(int model, int UNU rev, int physPin, const char *physNames[], int isAll) {
@@ -770,6 +833,7 @@ static void readallPhys(int model, int UNU rev, int physPin, const char *physNam
case MODEL_ODROID_C4:
case MODEL_ODROID_M1:
case MODEL_ODROID_M1S:
case MODEL_ODROID_M2:
printf (" | %2d | %5s", getDrive(pin), pupd[getPUPD(pin)]);
break;
default:
@@ -813,6 +877,7 @@ static void readallPhys(int model, int UNU rev, int physPin, const char *physNam
case MODEL_ODROID_C4:
case MODEL_ODROID_M1:
case MODEL_ODROID_M1S:
case MODEL_ODROID_M2:
printf (" | %-5s | %-2d", pupd[getPUPD(pin)], getDrive(pin));
break;
default:
@@ -1039,6 +1104,10 @@ void doReadall(int argc, char *argv[]) {
headerName = (isAll == FALSE) ? " M1S " : " Model ODROID-M1S ";
physNames = (char *) ((isAll == FALSE) ? physNamesOdroidM1S : physNamesOdroidM1SAll);
break;
case MODEL_ODROID_M2:
headerName = (isAll == FALSE) ? "--- M2 ---" : "---- Model ODROID-M2 ----";
physNames = (char *) ((isAll == FALSE) ? physNamesOdroidM2 : physNamesOdroidM2All);
break;
default:
printf("Oops - unknown model: %d\n", model);
return;

1
udev/rules.d/99-odroid-wiringpi-rockchip.rules
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@@ -1,2 +1,3 @@
# /dev/gpiomem
SUBSYSTEM=="rk3568-gpiomem", GROUP="odroid", MODE="0660"
SUBSYSTEM=="rk35xx-gpiomem", GROUP="odroid", MODE="0660"

1
wiringPi/Makefile.am
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@@ -24,6 +24,7 @@ libwiringPi_la_SOURCES = \
odroidhc4.c \
odroidm1.c \
odroidm1s.c \
odroidm2.c \
odroidn1.c \
odroidn2.c \
odroidxu3.c \

1276
wiringPi/odroidm2.c Normal file
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File diff suppressed because it is too large Load Diff

121
wiringPi/odroidm2.h Normal file
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@@ -0,0 +1,121 @@
/*----------------------------------------------------------------------------*/
/*
WiringPi ODROID-M2 Board Header file
*/
/*----------------------------------------------------------------------------*/
/*******************************************************************************
Copyright (C) 2024 Steve Jeong <steve@how2flow.net>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*******************************************************************************/
#ifndef __ODROID_M2_H__
#define __ODROID_M2_H__
// flag of Using "/dev/gpiomem" or "libgpiod"
#define DEVMEM
/*----------------------------------------------------------------------------*/
/* Common mmap block size for ODROID-M2 GRF register */
#define M2_GPIO_PIN_BASE 0
#define M2_GRF_BLOCK_SIZE 0xFFFF
#define GPIO_SIZE 32
/* setClkState mode */
#define M2_CLK_ENABLE 0
#define M2_CLK_DISABLE 1
#define M2_FUNC_GPIO 0
#define M2_FUNC_PWM 1
/* CLK (Used for pmu system) */
#define M2_PMU1CRU_BASE 0xFD7F0000
#define M2_PMU1CRU_GPIO_CLK_OFFSET (0x814 >> 2)
#define M2_PMU1CRU_GPIO_PCLK_BIT 5
/* CLK (Used for always on system) */
#define M2_CRU_BASE 0xFD7C0000
#define M2_CRU_GPIO1_CLK_OFFSET (0x840 >> 2)
#define M2_CRU_GPIO1_PCLK_BIT 14
#define M2_CRU_GPIO_CLK_OFFSET (M2_CRU_GPIO1_CLK_OFFSET + 0x1)
/* IOMUX GPIO0_A0:GPIO0_B7 PMU1: A0 ~ B3 PMU2(+0x4000): B4~D7 */
#define M2_PMU_IOC_BASE 0xFD5F0000
#define M2_PMU1_IOC_OFFSET 0x0
#define M2_PMU2_IOC_OFFSET (0x3FF4 >> 2) // (0x4000 - 0xC)
#define M2_PMU1_IOC_PUPD_OFFSET (0x20 >> 2)
#define M2_PMU1_IOC_DS_OFFSET (0x10 >> 2)
#define M2_PMU2_IOC_PUPD_OFFSET (0x4024 >> 2) // 0x28 -> 0x24 to unify the operations
#define M2_PMU2_IOC_DS_OFFSET (0x4008 >> 2) // 0x14 -> 0x08 to unify the operations
/* IOMUX GPIO1_A0:GPIO4_D7 (GPIO) */
#define M2_BUS_IOC_BASE 0xFD5F8000
#define M2_BUS_IOC_OFFSET 0x0
/* GPIO1_A0:GPIO1_D7 (PUPD/DS) */
#define M2_VCCIO1_4_IOC_PUPD_OFFSET (0x1100 >> 2) // 0x110 -> 0x100 to unify the operations
#define M2_VCCIO1_4_IOC_DS_OFFSET (0x1000 >> 2) // 0x20 -> 0x00 to unify the operations
/* GPIO2_A4:GPIO3_D7, GPIO4_C2:GPIO4_C6 (PUPD/DS) */
#define M2_VCCIO3_5_IOC_PUPD_OFFSET (0x2100 >> 2) // 0x120 -> 0x100
#define M2_VCCIO3_5_IOC_DS_OFFSET (0x2000 >> 2) // 0x44 -> 0x00 to unify the operations
/* GPIO4_D0:GPIO4_D7 (PUPD/DS) */
#define M2_VCCIO2_IOC_PUPD_OFFSET (0x3100 >> 2) // 0x14c -> 0x140 to unify the operations
#define M2_VCCIO2_IOC_DS_OFFSET (0x3018 >> 2) // 0x98 -> 0x18 to unify the operations
/* GPIO4_A0:GPIO4_C1 (PUPD/DS) */
#define M2_VCCIO6_IOC_PUPD_OFFSET (0x4130 >> 2) // 0x140 -> 0x130
#define M2_VCCIO6_IOC_DS_OFFSET (0x4000 >> 2) // 0x80 -> 0x00 to unify the operations
/* GPIO[0] */
#define M2_GPIO_0_BASE 0xFD8A0000
/* GPIO[1:4] */
#define M2_GPIO_1_BASE 0xFEC20000
#define M2_GPIO_2_BASE 0xFEC30000
#define M2_GPIO_3_BASE 0xFEC40000
#define M2_GPIO_4_BASE 0xFEC50000
/* GPIO Port Data common offset ([L]:A0~B7, [H]:C0~D7) */
#define M2_GPIO_DIR_OFFSET (0x8 >> 2)
#define M2_GPIO_SET_OFFSET 0x0
#define M2_GPIO_GET_OFFSET (0x70 >> 2)
/* GPIO DS LEVELS */
#define M2_DS_LEVEL_0 0b000
#define M2_DS_LEVEL_1 0b100
#define M2_DS_LEVEL_2 0b010
#define M2_DS_LEVEL_3 0b110
#define M2_DS_LEVEL_4 0b001
#define M2_DS_LEVEL_5 0b101
/* GPIO write mask for WriteByte */
#define M2_WRITE_BYTE_MASK_GPIO0_H 0x11000000
#define M2_WRITE_BYTE_MASK_GPIO1_L 0x0C000000
#define M2_WRITE_BYTE_MASK_GPIO3_H 0x30000000
#define M2_WRITE_BYTE_MASK_GPIO3_L 0x04000000
#define M2_WRITE_BYTE_MASK_GPIO4_L 0x08000000
#define CONSUMER "consumer"
#define M2_PWM_INTERNAL_CLK 24000000 // 24MHz
#ifdef __cplusplus
extern "C" {
#endif
extern void init_odroidm2 (struct libodroid *libwiring);
#ifdef __cplusplus
}
#endif
/*----------------------------------------------------------------------------*/
#endif /* __ODROID_M2_H__ */
/*----------------------------------------------------------------------------*/

10
wiringPi/wiringPi.c
View File

@@ -46,6 +46,7 @@
#include "odroidn2.h"
#include "odroidc4.h"
#include "odroidm1.h"
#include "odroidm2.h"
/*----------------------------------------------------------------------------*/
// Const string define
@@ -65,6 +66,7 @@ const char *piModelNames [16] =
"ODROID-HC4",
"ODROID-M1",
"ODROID-M1S",
"ODROID-M2",
};
const char *piRevisionNames [16] =
@@ -544,6 +546,11 @@ int piGpioLayout (void) {
libwiring.mem = 5;
libwiring.rev = 1;
break;
case MODEL_ODROID_M2:
libwiring.maker = MAKER_ROCKCHIP;
libwiring.mem = 5;
libwiring.rev = 1;
break;
case MODEL_UNKNOWN:
default:
libwiring.model = MAKER_UNKNOWN;
@@ -1269,6 +1276,9 @@ int wiringPiSetup (void)
case MODEL_ODROID_M1S:
init_odroidm1s(&libwiring);
break;
case MODEL_ODROID_M2:
init_odroidm2(&libwiring);
break;
default:
return wiringPiFailure (WPI_ALMOST,
"wiringPiSetup: Unknown model\n");

1
wiringPi/wiringPi.h
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@@ -62,6 +62,7 @@
#define MODEL_ODROID_HC4 7
#define MODEL_ODROID_M1 8
#define MODEL_ODROID_M1S 9
#define MODEL_ODROID_M2 10
#define MAKER_UNKNOWN 0
#define MAKER_AMLOGIC 1

1
wiringPi/wiringPiI2C.c
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@@ -268,6 +268,7 @@ int wiringPiI2CSetup (const int devId)
device = "/dev/i2c-2";
break;
case MODEL_ODROID_M1S:
case MODEL_ODROID_M2:
device = "/dev/i2c-0";
break;
}

1
wiringPi/wiringPiSPI.c
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@@ -150,6 +150,7 @@ int wiringPiSPISetupMode (int channel, int speed, int mode)
case MODEL_ODROID_C4:
case MODEL_ODROID_M1:
case MODEL_ODROID_M1S:
case MODEL_ODROID_M2:
sprintf(device, "%s%d", spiDevType0, channel);
break;
case MODEL_ODROID_XU3: