From 9ffe33a185dfa6c001ab69bae3fe80d7a2f0453e Mon Sep 17 00:00:00 2001 From: joshua-yang Date: Thu, 10 Jan 2019 15:32:42 +0900 Subject: [PATCH] ODROID-N1: Implement get pin MUX mode Because of the update for getting pin MUX, PUPD, DS status, its readall command on N1 always shows all the alternative mode as ALT1. So it is the partly update for that but won't update for support of the other new functions. Change-Id: If5e2c4894c4513d3b5c164b4918086022c2a3703 --- wiringPi/odroidn1.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/wiringPi/odroidn1.c b/wiringPi/odroidn1.c index 44df6ab..6af7dd9 100755 --- a/wiringPi/odroidn1.c +++ b/wiringPi/odroidn1.c @@ -303,8 +303,8 @@ static void pinMode (int pin, int mode) /*----------------------------------------------------------------------------*/ static int getAlt (int pin) { - uint32_t offset, target; - uint8_t bank, group; + uint32_t offset; + uint8_t bank, group, shift; uint8_t ret = 0; if (lib->mode == MODE_GPIO_SYS) @@ -316,23 +316,26 @@ static int getAlt (int pin) bank = pin / 32; group = (pin - bank * 32) / 8; offset = 0x10 * (bank > 1 ? bank - 2 : bank) + 0x4 * group; + shift = gpioToShiftGReg(pin) << 1; setClkState(pin, CLK_ENABLE); // Check if the pin is GPIO mode on GRF register if (bank < 2) { offset += PMUGRF_IOMUX_OFFSET; - if (*(grf[0] + (offset >> 2)) & (3 << (gpioToShiftGReg(pin) * 2))) - ret = 2; + ret = (*(grf[0] + (offset >> 2)) >> shift) & 0b11; } else { offset += GRF_IOMUX_OFFSET; - if (*(grf[1] + (offset >> 2)) & (3 << (gpioToShiftGReg(pin) * 2))) - ret = 2; + ret = (*(grf[1] + (offset >> 2)) >> shift) & 0b11; } // If it is GPIO mode, check it's direction - if (ret != 2) + if (ret == 0) ret = *(gpio[bank] + (GPIO_CON_OFFSET >> 2)) & (1 << gpioToShiftReg(pin)) ? 1 : 0; + else { + // ALT1 is GPIO mode(0b00) on this SoC + ret++; + } setClkState(pin, CLK_DISABLE);