mirror of
https://github.com/hardkernel/kernel_common_drivers.git
synced 2026-06-25 12:03:48 +09:00
clk: bringup kernel6.12 for s7d [1/1]
PD#SWPL-195763 Problem: support clk for s7d Solution: support clk for s7d Verify: s7d Change-Id: Icd1a1c9cf8f2bdbe10e18bc89291a1587cf0e7e1 Signed-off-by: shufei.zhao <shufei.zhao@amlogic.com>
This commit is contained in:
committed by
Wanwei Jiang
parent
4d92bb42f2
commit
1f01ce5ad4
@@ -104,6 +104,9 @@ CONFIG_AMLOGIC_COMMON_AO_CLK_T5W=m
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# amlogic-clk-soc-t3x.ko
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CONFIG_AMLOGIC_COMMON_CLK_T3X=m
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# amlogic-clk-soc-s7d.ko
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CONFIG_AMLOGIC_COMMON_CLK_S7D=m
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# amlogic-pinctrl-soc-s4.ko
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CONFIG_AMLOGIC_PINCTRL_MESON_S4=m
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@@ -321,4 +321,14 @@ config AMLOGIC_COMMON_CLK_A4
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help
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Support for the clock controller on Amlogic
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devices, aka A4. Say Y if you want peripherals to work.
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config AMLOGIC_COMMON_CLK_S7D
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tristate "Meson S7D clock controller"
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depends on AMLOGIC_COMMON_CLK_MESON_REGMAP
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depends on AMLOGIC_COMMON_CLK_MESON_DUALDIV
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depends on AMLOGIC_COMMON_CLK_MESON_PLL
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depends on MFD_SYSCON
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help
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Support for the clock controller on Amlogic S7D
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devices, aka ao s7d. Say Y if you want peripherals to work.
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endmenu
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@@ -182,3 +182,10 @@ $(A4_MODULE_NAME)-y += a4.o
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PR_FMT_A4 = $(subst amlogic-,,$(A4_MODULE_NAME))
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PR_FMT_DEFINE_A4="-Dpr_fmt(fmt)= \"[$(PR_FMT_A4)]: \" fmt"
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CFLAGS_A4.o += $(PR_FMT_DEFINE_A4)
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S7D_MODULE_NAME = amlogic-clk-soc-s7d
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obj-$(CONFIG_AMLOGIC_COMMON_CLK_S7D) += $(S7D_MODULE_NAME).o
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$(S7D_MODULE_NAME)-y += s7d.o
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PR_FMT_S7D = $(subst amlogic-,,$(S7D_MODULE_NAME))
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PR_FMT_DEFINE_S7D="-Dpr_fmt(fmt)= \"[$(PR_FMT_S7D)]: \" fmt"
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CFLAGS_s7d.o += $(PR_FMT_DEFINE_S7D)
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@@ -3249,6 +3249,128 @@ static struct meson_msr_id clk_msr_c1[] __initdata = {
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CLK_MSR_ID(92, "ddr_dpll_pt_clk"),
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};
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static struct meson_msr_id clk_msr_s7d[] __initdata = {
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CLK_MSR_ID(0, "cts_sys_clk"),
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CLK_MSR_ID(1, "cts_axi_clk"),
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CLK_MSR_ID(2, "cts_rtc_clk"),
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CLK_MSR_ID(4, "cts_mali_stack_clk"),
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CLK_MSR_ID(5, "cts_mali_clk"),
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CLK_MSR_ID(6, "sys_cpu_clk_div16"),
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CLK_MSR_ID(8, "cts_cecb_clk"),
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CLK_MSR_ID(9, "cts_mali_ACLKM"),
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CLK_MSR_ID(10, "fclk_div5"),
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CLK_MSR_ID(11, "p21_usb2_ckout"),
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CLK_MSR_ID(12, "p20_usb2_ckout"),
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CLK_MSR_ID(13, "eth_mpll_test"),
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CLK_MSR_ID(15, "mpll_clk_50m"),
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CLK_MSR_ID(18, "gp1_pll_clk"),
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CLK_MSR_ID(19, "hifi0_pll_clk"),
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CLK_MSR_ID(20, "gp0_pll_clk"),
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CLK_MSR_ID(21, "hifi1_pll_clk"),
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CLK_MSR_ID(22, "eth_mppll_50m_ckout"),
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CLK_MSR_ID(23, "sys_pll_div16"),
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CLK_MSR_ID(24, "ddr_dpll_pt_clk"),
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CLK_MSR_ID(25, "mod_Tsin_A_CLK_IN"),
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CLK_MSR_ID(26, "mod_Tsin_B_CLK_IN"),
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CLK_MSR_ID(31, "earcrx_pll_clk_out"),
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CLK_MSR_ID(32, "cts_eth_clk125Mhz"),
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CLK_MSR_ID(33, "cts_eth_clk_rmii"),
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CLK_MSR_ID(34, "co_clkin_to_mac"),
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CLK_MSR_ID(36, "co_rx_clk"),
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CLK_MSR_ID(37, "co_tx_clk"),
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CLK_MSR_ID(38, "eth_phy_rxclk"),
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CLK_MSR_ID(39, "eth_phy_plltxclk"),
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CLK_MSR_ID(40, "ephy_test_clk"),
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CLK_MSR_ID(49, "hdmi_vx1_pix_clk"),
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CLK_MSR_ID(50, "vid_pll_div_clk_out"),
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CLK_MSR_ID(51, "cts_enci_clk"),
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CLK_MSR_ID(52, "cts_encp_clk"),
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CLK_MSR_ID(53, "cts_encl_clk"),
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CLK_MSR_ID(54, "cts_vdac_clk"),
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CLK_MSR_ID(55, "cts_cdac_clk_c"),
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CLK_MSR_ID(57, "lcd_an_clk_ph2"),
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CLK_MSR_ID(58, "lcd_an_clk_ph3"),
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CLK_MSR_ID(59, "cts_hdmi_tx_pixel_clk"),
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CLK_MSR_ID(60, "cts_vdin_meas_clk"),
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CLK_MSR_ID(61, "cts_vpu_clk"),
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CLK_MSR_ID(62, "cts_vpu_clkb"),
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CLK_MSR_ID(63, "cts_vpu_clkb_tmp"),
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CLK_MSR_ID(64, "cts_vpu_clkc"),
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CLK_MSR_ID(65, "cts_vid_lock_clk"),
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CLK_MSR_ID(66, "cts_vapbclk"),
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CLK_MSR_ID(67, "cts_ge2d_clk"),
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CLK_MSR_ID(76, "hdmitx_tmds_clk"),
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CLK_MSR_ID(77, "cts_hdmitx_sys_clk"),
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CLK_MSR_ID(78, "cts_hdmitx_fe_clk"),
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CLK_MSR_ID(80, "cts_hdmitx_prif_clk"),
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CLK_MSR_ID(81, "cts_hdmitx_200m_clk"),
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CLK_MSR_ID(82, "cts_hdmitx_aud_clk"),
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CLK_MSR_ID(84, "audio_tohdmitx_mclk"),
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CLK_MSR_ID(85, "audio_tohdmitx_bclk"),
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CLK_MSR_ID(86, "audio_tohdmitx_lrclk"),
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CLK_MSR_ID(87, "audio_tohdmitx_spdif_clk"),
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CLK_MSR_ID(88, "htx_aes_clk"),
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CLK_MSR_ID(89, "cts_amfc_clk"),
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CLK_MSR_ID(93, "cts_vdec_clk"),
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CLK_MSR_ID(97, "cts_hcodec_clk"),
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CLK_MSR_ID(99, "cts_hevcf_clk"),
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CLK_MSR_ID(106, "deskew_pll_clk_div32_out"),
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CLK_MSR_ID(110, "cts_sc_clk(smartcard)"),
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CLK_MSR_ID(111, "cts_aux_adc_clk"),
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CLK_MSR_ID(113, "cts_sd_emmc_C_clk(nand)"),
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CLK_MSR_ID(114, "cts_sd_emmc_B_clk"),
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CLK_MSR_ID(115, "cts_sd_emmc_A_clk"),
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CLK_MSR_ID(116, "gpio_msr_clk"),
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CLK_MSR_ID(117, "aux_clk_o"),
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CLK_MSR_ID(118, "cts_spicc_0_clk"),
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CLK_MSR_ID(121, "cts_ts_clk(temp sensor)"),
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CLK_MSR_ID(130, "o_vad_clk"),
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CLK_MSR_ID(131, "au_dac_clk_x128"),
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CLK_MSR_ID(132, "audio_locker_in_clk"),
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CLK_MSR_ID(133, "audio_locker_out_clk"),
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CLK_MSR_ID(134, "audio_tdmout_c_sclk"),
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CLK_MSR_ID(135, "audio_tdmout_b_sclk"),
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CLK_MSR_ID(136, "audio_tdmout_a_sclk"),
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CLK_MSR_ID(137, "audio_tdmin_lb_sclk"),
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CLK_MSR_ID(138, "audio_tdmin_c_sclk"),
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CLK_MSR_ID(139, "audio_tdmin_b_sclk"),
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CLK_MSR_ID(140, "audio_tdmin_a_sclk"),
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CLK_MSR_ID(141, "audio_resamplea_clk"),
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CLK_MSR_ID(142, "audio_pdm_sysclk"),
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CLK_MSR_ID(143, "audio_spdifout_b_mst_clk"),
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CLK_MSR_ID(144, "audio_spdifout_mst_clk"),
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CLK_MSR_ID(145, "audio_spdifin_mst_clk"),
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CLK_MSR_ID(146, "mod_audio_pdm_dclk_o"),
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CLK_MSR_ID(147, "audio_resampleb_clk"),
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CLK_MSR_ID(160, "pwm_j_clk"),
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CLK_MSR_ID(161, "pwm_i_clk"),
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CLK_MSR_ID(162, "pwm_h_clk"),
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CLK_MSR_ID(163, "pwm_g_clk"),
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CLK_MSR_ID(164, "pwm_f_clk"),
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CLK_MSR_ID(165, "pwm_e_clk"),
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CLK_MSR_ID(166, "pwm_d_clk"),
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CLK_MSR_ID(167, "pwm_c_clk"),
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CLK_MSR_ID(168, "pwm_b_clk"),
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CLK_MSR_ID(169, "pwm_a_clk"),
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CLK_MSR_ID(176, "rng_ring_clk[0]"),
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CLK_MSR_ID(177, "rng_ring_clk[1]"),
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CLK_MSR_ID(178, "rng_ring_clk[2]"),
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CLK_MSR_ID(179, "rng_ring_clk[3]"),
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CLK_MSR_ID(180, "osc_ring_clk[0](a55 core0 14_slvt)"),
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CLK_MSR_ID(181, "osc_ring_clk[1](a55 core1 14_slvt)"),
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CLK_MSR_ID(182, "osc_ring_clk[2](a55 core1 14_slvt)"),
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CLK_MSR_ID(183, "osc_ring_clk[3](a55 core1 14_slvt)"),
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CLK_MSR_ID(184, "osc_ring_clk[4](a55_pwr[0] 16_slvt)"),
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CLK_MSR_ID(185, "osc_ring_clk[5](a55_pwr[1] 14_lvt)"),
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CLK_MSR_ID(186, "osc_ring_clk[6](a55_pwr[2] 14_rvt)"),
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CLK_MSR_ID(187, "osc_ring_clk[7](mali[1] 14_lvt)"),
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CLK_MSR_ID(188, "osc_ring_clk[8](mali[1] 14_rvt)"),
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CLK_MSR_ID(189, "osc_ring_clk[9](dos[0] 16_lvt)"),
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CLK_MSR_ID(190, "osc_ring_clk[10](dos[1] 14_rvt)"),
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CLK_MSR_ID(191, "osc_ring_clk[11](ddr[0] 9t_14_lvt)"),
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CLK_MSR_ID(192, "osc_ring_clk[12](top[0] 16_rvt)"),
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};
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static struct meson_msr_id clk_msr_a5[] __initdata = {
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CLK_MSR_ID(0, "cts_sys_clk"),
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CLK_MSR_ID(1, "cts_axi_clk"),
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@@ -3917,6 +4039,15 @@ static struct meson_msr_data meson_c1_data __initdata = {
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.reg2_offset = 0x8,
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};
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static struct meson_msr_data meson_s7d_data __initdata = {
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.msr_table = (struct meson_msr_id *)&clk_msr_s7d,
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.table_size = ARRAY_SIZE(clk_msr_s7d),
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.duty_offset = (0x6 * 4),
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.reg0_offset = 0x0,
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.reg1_offset = 0x4,
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.reg2_offset = 0x8,
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};
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static struct meson_msr_data meson_a5_data __initdata = {
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.msr_table = (struct meson_msr_id *)&clk_msr_a5,
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.table_size = ARRAY_SIZE(clk_msr_a5),
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@@ -4047,6 +4178,10 @@ static const struct of_device_id meson_msr_match_table[] = {
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.compatible = "amlogic,meson-c1-clk-measure",
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.data = &meson_c1_data,
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},
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{
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.compatible = "amlogic,meson-s7d-clk-measure",
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.data = &meson_s7d_data,
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},
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{
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.compatible = "amlogic,meson-a5-clk-measure",
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.data = &meson_a5_data,
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File diff suppressed because it is too large
Load Diff
@@ -37,6 +37,7 @@ AMLOGIC_COMMON_MODULES = [
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"common_drivers/drivers/clk/meson/amlogic-clk-soc-t5m.ko",
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"common_drivers/drivers/clk/meson/amlogic-clk-soc-t5w.ko",
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"common_drivers/drivers/clk/meson/amlogic-clk-soc-t7.ko",
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"common_drivers/drivers/clk/meson/amlogic-clk-soc-s7d.ko",
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"common_drivers/drivers/cpufreq/amlogic-cpufreq.ko",
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"common_drivers/drivers/cpu_info/amlogic-cpuinfo.ko",
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"common_drivers/drivers/crypto/amlogic-crypto-dma.ko",
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