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https://github.com/hardkernel/kernel_common_drivers.git
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vicp: add film grain support for S6 [1/1]
PD#SWPL-175298 Problem: add film grain support for S6 Solution: add film grain support for S6 Verify: S6 Change-Id: Ic10b45b44b40a4bb944e15934f807be39e624dc0 Signed-off-by: qiyao.zhou <qiyao.zhou@amlogic.com>
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@@ -355,12 +355,14 @@ void set_vid_cmpr_hdr(struct vid_cmpr_hdr_s config)
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static void set_vid_cmpr_fgrain(struct vid_cmpr_top_s *vid_cmpr_top)
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{
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struct vicp_fgrain_ctrl_reg_s fgrain_ctrl_reg;
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int window_v_bgn, window_v_end, window_h_bgn, window_h_end;
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u8 *temp_addr;
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int data_size = 0, i = 0;
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struct vicp_fgrain_alone_mode_ctrl_reg_s alone_mode_ctrl_reg;
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int fg_10bit_mode = 1, fg_path_sel = 0, fg_block_mode = 0;
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struct vicp_fgrain_ctrl_reg_s fgrain_ctrl_reg;
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struct vicp_fgrain_alone_mode_ctrl_reg_s alone_ctrl_reg;
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struct vicp_fgrain_post_ctrl_reg_s post_ctrl_reg;
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u32 value = 0;
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if (!vicp_dev.film_grain_support) {
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vicp_print(VICP_INFO, "don't support film grain.\n");
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@@ -385,65 +387,64 @@ static void set_vid_cmpr_fgrain(struct vid_cmpr_top_s *vid_cmpr_top)
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pr_info("vicp: #################################.\n");
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};
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memset(&fgrain_ctrl_reg, 0, sizeof(struct vicp_fgrain_ctrl_reg_s));
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if (!vid_cmpr_top->film_grain_en)//off fgrain
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return set_fgrain_control(fgrain_ctrl_reg);
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fgrain_ctrl_reg.sync_ctrl = 0;
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fgrain_ctrl_reg.dma_st_clr = 0;
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fgrain_ctrl_reg.hold4dma_scale = 0;
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fgrain_ctrl_reg.hold4dma_tbl = 0;
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fgrain_ctrl_reg.cin_uv_swap = 0;
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fgrain_ctrl_reg.cin_rev = 0;
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fgrain_ctrl_reg.yin_rev = 0;
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fgrain_ctrl_reg.use_par_apply_fgrain = 0;
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if (vid_cmpr_top->src_compress == 0) {
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fgrain_ctrl_reg.fgrain_last_ln_mode = 1;
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fgrain_ctrl_reg.fgrain_ext_imode = 1;
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} else {
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fgrain_ctrl_reg.fgrain_last_ln_mode = 0;
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fgrain_ctrl_reg.fgrain_ext_imode = 1;
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if (vid_cmpr_top->film_grain_en == 0) {
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vicp_reg_set_bits(VID_CMPR_AFBCDM_FGRAIN_CTRL, 0, 0, 10);
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return;
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}
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fgrain_ctrl_reg.fgrain_use_sat4bp = 0;
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fgrain_ctrl_reg.apply_c_mode = 1;
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fgrain_ctrl_reg.fgrain_tbl_sign_mode = 1;
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fgrain_ctrl_reg.fgrain_tbl_ext_mode = 1;
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fgrain_ctrl_reg.fmt_mode = vid_cmpr_top->src_fmt_mode;
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if (vid_cmpr_top->src_compbits == 8)
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fgrain_ctrl_reg.comp_bits = 0;
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else if (vid_cmpr_top->src_compbits == 10)
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fgrain_ctrl_reg.comp_bits = 1;
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else
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fgrain_ctrl_reg.comp_bits = 2;
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fgrain_ctrl_reg.rev_mode = 0;
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fgrain_ctrl_reg.block_mode = vid_cmpr_top->src_compress;
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fgrain_ctrl_reg.fgrain_loc_en = 1;
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fgrain_ctrl_reg.fgrain_glb_en = 1;
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set_fgrain_control(fgrain_ctrl_reg);
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if (vid_cmpr_top->src_compress == 0) {//rdmif
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window_v_bgn = vid_cmpr_top->src_win_bgn_v;
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window_v_end = vid_cmpr_top->src_win_end_v;
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window_h_bgn = vid_cmpr_top->src_win_bgn_h;
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window_h_end = vid_cmpr_top->src_win_end_h;
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} else {//afbcd
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if (vid_cmpr_top->film_grain_en >> 1) {//post en
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fg_path_sel = 1;
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fg_block_mode = 0;
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} else {//pre_en
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fg_path_sel = 0;
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fg_block_mode = vid_cmpr_top->src_compress;
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}
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if (fg_block_mode) {
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window_v_bgn = (vid_cmpr_top->src_win_bgn_v) / 4 * 4;
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window_v_end = (vid_cmpr_top->src_win_end_v + 3) / 4 * 4 - 4;
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window_h_bgn = (vid_cmpr_top->src_win_bgn_h) / 32 * 32;
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window_h_end = (vid_cmpr_top->src_win_end_h + 1 + 31) / 32 * 32 - 32;
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} else {
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window_v_bgn = vid_cmpr_top->src_win_bgn_v;
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window_v_end = vid_cmpr_top->src_win_end_v;
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window_h_bgn = vid_cmpr_top->src_win_bgn_h;
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window_h_end = vid_cmpr_top->src_win_end_h;
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}
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memset(&fgrain_ctrl_reg, 0, sizeof(struct vicp_fgrain_ctrl_reg_s));
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fgrain_ctrl_reg.fgrain_glb_en = 1;
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fgrain_ctrl_reg.fgrain_loc_en = 1;
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fgrain_ctrl_reg.block_mode = fg_block_mode;
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fgrain_ctrl_reg.rev_mode = 0;
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fgrain_ctrl_reg.comp_bits = fg_10bit_mode;
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fgrain_ctrl_reg.fmt_mode = vid_cmpr_top->src_fmt_mode;
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if (fg_block_mode) {
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fgrain_ctrl_reg.fgrain_ext_imode = !fg_path_sel;
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fgrain_ctrl_reg.fgrain_last_ln_mode = 0;
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} else {
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fgrain_ctrl_reg.fgrain_ext_imode = 0;
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fgrain_ctrl_reg.fgrain_last_ln_mode = !fg_path_sel;
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}
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fgrain_ctrl_reg.apply_c_mode = 1;
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fgrain_ctrl_reg.fgrain_tbl_sign_mode = 1;
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fgrain_ctrl_reg.fgrain_tbl_ext_mode = 1;
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set_fgrain_control(fgrain_ctrl_reg);
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set_fgrain_window_v(window_v_bgn, window_v_end);
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set_fgrain_window_h(window_h_bgn, window_h_end);
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memset(&alone_mode_ctrl_reg, 0, sizeof(struct vicp_fgrain_alone_mode_ctrl_reg_s));
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alone_mode_ctrl_reg.debug_demo_inverse = 0;
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alone_mode_ctrl_reg.debug_demo_en = 0;
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alone_mode_ctrl_reg.final_gain_1 = 16;
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alone_mode_ctrl_reg.final_gain_0 = 16;
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alone_mode_ctrl_reg.lut_up_mode = 1;
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alone_mode_ctrl_reg.alone_mode = 1;
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set_fgrain_alone_mode_control(alone_mode_ctrl_reg);
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memset(&alone_ctrl_reg, 0, sizeof(struct vicp_fgrain_alone_mode_ctrl_reg_s));
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alone_ctrl_reg.debug_demo_inverse = 0;
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alone_ctrl_reg.debug_demo_en = 0;
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alone_ctrl_reg.final_gain_1 = 16;
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alone_ctrl_reg.final_gain_0 = 16;
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alone_ctrl_reg.lut_up_mode = 1;
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alone_ctrl_reg.alone_mode = fg_path_sel;
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set_fgrain_alone_mode_control(alone_ctrl_reg);
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set_fgrain_path_control(fg_path_sel);
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memset(&post_ctrl_reg, 0, sizeof(struct vicp_fgrain_post_ctrl_reg_s));
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post_ctrl_reg.hsize = window_h_end - window_h_bgn + 1;
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@@ -453,17 +454,19 @@ static void set_vid_cmpr_fgrain(struct vid_cmpr_top_s *vid_cmpr_top)
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post_ctrl_reg.mode_422to444 = 0;
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post_ctrl_reg.mode_444to422 = 0;
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post_ctrl_reg.inp_422 = 0;
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post_ctrl_reg.post_en = 1;
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post_ctrl_reg.post_en = fg_path_sel;
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set_fgrain_post_control(post_ctrl_reg);
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set_fgrain_slice_window_h(0, window_h_end - window_h_bgn);
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set_fgrain_slice_window_h(0, window_h_end);
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data_size = FILM_GRAIN_LUT_DATA_SIZE * sizeof(int);
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temp_addr = codec_mm_vmap(vid_cmpr_top->film_lut_addr, data_size);
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codec_mm_dma_flush(temp_addr, data_size * sizeof(int), DMA_FROM_DEVICE);
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codec_mm_dma_flush(temp_addr, data_size, DMA_FROM_DEVICE);
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for (i = 0; i < FILM_GRAIN_LUT_DATA_SIZE; i++)
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set_fgrain_lut_data(*(u32 *)(temp_addr + i));
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for (i = 0; i < FILM_GRAIN_LUT_DATA_SIZE; i++) {
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value = *((u32 *)temp_addr + i);
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set_fgrain_lut_data(value);
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}
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codec_mm_unmap_phyaddr(temp_addr);
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set_fgrain_ppconv_size(vid_cmpr_top->src_hsize, vid_cmpr_top->src_vsize);
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@@ -2167,7 +2170,10 @@ int vicp_process_config(struct vicp_data_config_s *data_config,
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}
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if (input_vframe->fgs_valid && input_vframe->fgs_table_adr) {
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vid_cmpr_top->film_grain_en = 1;
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if (vid_cmpr_top->src_fmt_mode == 0)
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vid_cmpr_top->film_grain_en = 3;
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else
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vid_cmpr_top->film_grain_en = 1;
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vid_cmpr_top->film_lut_addr = input_vframe->fgs_table_adr;
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input_vframe->fgs_valid = false;
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} else {
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