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deinterlace: txhd2 Insufficient bandwidth [1/1]

Browse Source 
PD#SWPL-161202

Problem:
Insufficient bandwidth

Solution:
10bit-8bit

Verify:
txhd2

Change-Id: Icd2c39d96a03c7852e2c5a43407bb489bf23f74d
Signed-off-by: yufei.huan <yufei.huan@amlogic.com>
This commit is contained in:
yufei.huan
2024-04-01 06:30:08 +00:00
committed by gerrit autosubmit
parent a403694421
commit 41b8a3ba39
6 changed files with 43 additions and 34 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/media/di_multi/deinterlace.c
+10 -9
View File
@@ -5709,9 +5709,10 @@ unsigned char dim_pre_de_buf_config(unsigned int channel)
jiffies_to_msecs(jiffies_64 -
vframe->ready_jiffies64));
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
if (DIM_IS_IC_TXHD2) {
ppre->di_nrwr_mif.nr_wr_mif_8bit = -1;
if (pch->record_10bit_flag && pch->record_8bit_flag)
ppre->di_nrwr_mif.nr_wr_mif_8bit = -1;
if (!dimp_get(edi_mp_force_422_8bit)) {
if (pch->record_10bit_flag) {
pch->switch_index = pch->cur_index;
@@ -7672,7 +7673,7 @@ static void dimpst_fill_outvf(struct vframe_s *vfm,
unsigned int ch;
struct di_ch_s *pch;
bool ext_buf = false;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
unsigned int ori_vfm_bitdepth;
#endif
@@ -7778,7 +7779,7 @@ static void dimpst_fill_outvf(struct vframe_s *vfm,
BITDEPTH_U8 |
BITDEPTH_V8);
}
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
ori_vfm_bitdepth = vfm->bitdepth;
if (di_buf->bit_8_flag == 1) {
dim_print("bitdepth: 0x%x\n", vfm->bitdepth);
@@ -8135,7 +8136,7 @@ int dim_post_process(void *arg, unsigned int zoom_start_x_lines,
}
if (dip_itf_is_ins(pch) && dim_dbg_new_int(2))
dim_dbg_buffer2(di_buf->c.buffer, 7);
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
if (DIM_IS_IC_TXHD2) {
ppost->di_buf2_mif.bit8_flag = ppre->di_nrwr_mif.nr_wr_mif_8bit;
dim_print("di_nrwr_mif.nr_wr_mif_8bit:%d\n", ppre->di_nrwr_mif.nr_wr_mif_8bit);
@@ -8877,7 +8878,7 @@ int dim_post_process(void *arg, unsigned int zoom_start_x_lines,
}
/* */
} else {
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
if (DIM_IS_IC_TXHD2) {
ppost->di_buf0_mif.bit8_flag = ppre->di_chan2_mif.bit8_flag;
ppost->di_buf1_mif.bit8_flag = ppre->di_mem_mif.bit8_flag;
@@ -8948,7 +8949,7 @@ int dim_post_process(void *arg, unsigned int zoom_start_x_lines,
dim_print("0x%px:\n", acfg->buf_o->vframe);
}
} else {
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
if (DIM_IS_IC_TXHD2) {
ppost->di_buf0_mif.bit8_flag = ppre->di_chan2_mif.bit8_flag;
ppost->di_buf1_mif.bit8_flag = ppre->di_mem_mif.bit8_flag;
@@ -9650,7 +9651,7 @@ static void set_pulldown_mode(struct di_buf_s *di_buf, unsigned int channel)
if (pre_buf_p) {
di_buf->pd_config.global_mode =
pre_buf_p->pd_config.global_mode;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
if (DIM_IS_IC_TXHD2) {
if (ppre->di_nrwr_mif.nr_wr_mif_8bit == 1 ||
ppre->di_nrwr_mif.nr_wr_mif_8bit == 0) {
@@ -10930,7 +10931,7 @@ void di_unreg_variable(unsigned int channel)
pch->self_trig_need = 0;
pch->rsc_bypass.d32 = 0;
pch->sts_keep = 0;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
pch->record_10bit_flag = 0;
pch->record_8bit_flag = 0;
#endif
drivers/media/di_multi/deinterlace.h
+4 -1
View File
@@ -49,6 +49,9 @@
************************************************/
#define DIM_HAVE_HDR (1)
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#define CONFIG_AMLOGIC_MEDIA_THERMAL1 (1)
#endif
/************************************************
* function:decontour use detect border
* char aml_ldim_get_bbd_state(void) in
@@ -382,7 +385,7 @@ struct di_buf_s {
bool hf_irq;
bool dw_have;
bool flg_dummy;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
bool bit_8_flag;
#endif
};
drivers/media/di_multi/deinterlace_hw.c
+10 -10
View File
@@ -1755,7 +1755,7 @@ static void set_di_mem_mif(struct DI_MIF_S *mif, int urgent, int hold_line)
unsigned int chroma0_rpt_loop_end;
unsigned int chroma0_rpt_loop_pat;
unsigned int reset_on_gofield;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
unsigned int bit_mode_val;
#endif
@@ -1793,7 +1793,7 @@ static void set_di_mem_mif(struct DI_MIF_S *mif, int urgent, int hold_line)
chroma0_rpt_loop_pat = 0x00;
}
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
bit_mode_val = mif->bit_mode;
if (mif->bit8_flag == 1)
mif->bit_mode = 0;
@@ -2251,7 +2251,7 @@ static void set_di_chan2_mif(struct DI_MIF_S *mif, int urgent, int hold_line)
unsigned int chroma0_rpt_loop_end;
unsigned int chroma0_rpt_loop_pat;
unsigned int reset_on_gofield;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
unsigned int bit_mode_val;
#endif
@@ -2301,7 +2301,7 @@ static void set_di_chan2_mif(struct DI_MIF_S *mif, int urgent, int hold_line)
}
#endif
demux_mode = mif->video_mode;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
bit_mode_val = mif->video_mode;
dim_print("mif->bit8_flag:%d %d\n", mif->bit8_flag, mif->video_mode);
if (mif->bit8_flag == 1)
@@ -2890,7 +2890,7 @@ void dimh_post_switch_buffer(struct DI_MIF_S *di_buf0_mif,
bool mc_enable, int vskip_cnt)
{
int ei_only, buf1_en;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
unsigned int bit_val[3] = {3, 3, 3};
#endif
@@ -2935,7 +2935,7 @@ void dimh_post_switch_buffer(struct DI_MIF_S *di_buf0_mif,
di_mtnprd_mif->canvas_num, 16, 8);
/* current field mtn canvas index.*/
}
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
if (DIM_IS_IC_TXHD2) {
/**
** post mif bitdepth follow nr mif change frame by frame
@@ -3257,7 +3257,7 @@ void dimh_enable_di_post_2(struct DI_MIF_S *di_buf0_mif,
di_diwr_mif->bit_mode);
} else {
dimh_pst_mif_set(di_diwr_mif, urgent, di_ddr_en);
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
if (di_buf2_mif->bit8_flag == 1 || di_buf2_mif->bit8_flag == 2) {
di_buf2_mif->bit_mode = 0;
di_diwr_mif->bit_mode = 0;
@@ -3287,7 +3287,7 @@ void dimh_enable_di_post_2(struct DI_MIF_S *di_buf0_mif,
(urgent << 16) |
(2 << 26) |
(di_ddr_en << 30));
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
if (di_buf2_mif->bit8_flag == 1 || di_buf2_mif->bit8_flag == 2) {
di_buf2_mif->bit_mode = 0;
di_diwr_mif->bit_mode = 0;
@@ -5206,7 +5206,7 @@ static void dimh_wrmif_set(struct DI_SIM_MIF_S *cfg_mif,
{
const unsigned int *reg;
unsigned int ctr;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
unsigned int bit_mode_val;
#endif
@@ -5218,7 +5218,7 @@ static void dimh_wrmif_set(struct DI_SIM_MIF_S *cfg_mif,
if (!cfg_mif->ddr_en)
return;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
if (DIM_IS_IC_TXHD2) {
bit_mode_val = cfg_mif->bit_mode;
if (cfg_mif->nr_wr_mif_8bit == 1 ||
drivers/media/di_multi/deinterlace_hw.h
+1 -5
View File
@@ -327,9 +327,7 @@ struct DI_MIF_S {
/**/
enum DI_MIF0_ID mif_index; /* */
char *name;
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
unsigned int bit8_flag;
#endif
};
struct DI_SIM_MIF_S {
@@ -383,10 +381,8 @@ struct DI_SIM_MIF_S {
unsigned short blend_en; //20220126
unsigned short vecrd_offset; //20220126
enum DI_MIFS_ID mif_index; /* */
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
unsigned int nr_wr_mif_8bit :3;
unsigned int nr_wr_mif_8bit;
bool di_wr_bit8_flag;
#endif
};
struct DI_MC_MIF_s {
drivers/media/di_multi/di_data_l.h
+3 -4
View File
@@ -178,8 +178,9 @@ enum EDI_CFG_TOP_IDX {
EDI_CFG_EN_PRE_LINK,
EDI_CFG_AFBCE_LOSS_EN,
EDI_CFG_TB,
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
EDI_CFG_TEMP_CONTROL,
EDI_CFG_422_8bit,
#endif
EDI_CFG_PRE_NUB,
EDI_CFG_END,
@@ -1088,9 +1089,7 @@ enum EDI_MP_UI_T {
edi_mp_blend_mode,
edi_mp_tb_dump,
edi_mp_prelink_hold_line,
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
edi_mp_force_422_8bit,
#endif
EDI_MP_SUB_DI_E,
/**************************************/
EDI_MP_SUB_NR_B,
@@ -2093,7 +2092,7 @@ struct di_ch_s {
bool en_tb; //
unsigned char tb_owner; //
bool tb_busy;//
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
bool record_8bit_flag;
bool record_10bit_flag;
unsigned int cur_index;
drivers/media/di_multi/di_prc.c
+15 -5
View File
@@ -299,11 +299,15 @@ const struct di_cfg_ctr_s di_cfg_top_ctr[K_DI_CFG_NUB] = {
EDI_CFG_TB,
0,
K_DI_CFG_T_FLG_DTS},
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
[EDI_CFG_TEMP_CONTROL] = {"temp_control",
EDI_CFG_TEMP_CONTROL,
0,
K_DI_CFG_T_FLG_DTS},
[EDI_CFG_422_8bit] = {"422_8bit",
EDI_CFG_422_8bit,
0,
K_DI_CFG_T_FLG_DTS},
#endif
[EDI_CFG_PRE_NUB] = {"pre_nub",
/* 0:not config pre nub;*/
@@ -484,6 +488,13 @@ void di_cfg_top_dts(void)
cfgs(TB, 0);
}
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
if (cfgg(422_8bit))
dimp_set(edi_mp_force_422_8bit, 1);
else
dimp_set(edi_mp_force_422_8bit, 0);
#endif
#ifdef TMP_EN_PLINK
//disable p-only:
if (cfgg(PONLY_MODE)) {
@@ -937,10 +948,8 @@ const struct di_mp_uit_s di_mp_ui_top[] = {
edi_mp_tb_dump, 0},//1400
[edi_mp_prelink_hold_line] = {"pre_hold_line:ushort:8",
edi_mp_prelink_hold_line, 8},
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
[edi_mp_force_422_8bit] = {"force_422_8bit:8",
edi_mp_force_422_8bit, -1},
#endif
[EDI_MP_SUB_DI_E] = {"di end-------",
EDI_MP_SUB_DI_E, 0},
/**************************************/
@@ -3041,7 +3050,8 @@ static enum EDPST_MODE dim_cnt_mode(struct di_ch_s *pch)
if (dim_cfg_nv21()) {
mode = EDPST_MODE_NV21_8BIT;
} else {
if (dimp_get(edi_mp_nr10bit_support)) {
if (dimp_get(edi_mp_nr10bit_support) &&
dimp_get(edi_mp_force_422_8bit) != 1) {
if (dimp_get(edi_mp_full_422_pack))
mode = EDPST_MODE_422_10BIT_PACK;
else
@@ -3221,7 +3231,7 @@ void dip_init_value_reg(unsigned int ch, struct vframe_s *vframe)
dimp_set(edi_mp_prog_proc_config, 0x23);
dimp_set(edi_mp_use_2_interlace_buff, 1);
}
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL
#ifdef CONFIG_AMLOGIC_MEDIA_THERMAL1
pch->record_10bit_flag = 1;
pch->record_8bit_flag = 1;
#endif