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drm: enable encl clk for s5 in kernel 5.15 [1/1]

Browse Source 
PD#SWPL-148836

Problem:
no vsync after set dummy_l mode

Solution:
enable encl clk instead of encp clk when set dummy mode

Verify:
s5

Test:
DRM-OSD-137

Change-Id: I2509df97dcbb0617c957803a09c8b87f4b5b964f
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
This commit is contained in:
mingyang.he
2023-12-14 08:46:02 +00:00
committed by Luan Yuan
parent 4057e4842c
commit 472e18952f
1 changed files with 0 additions and 18 deletions
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drivers/media/vout/vout_serve/dummy_venc.c
-18
View File
@@ -1212,24 +1212,6 @@ static void dummy_encl_clk_ctrl(struct dummy_venc_driver_s *venc_drv, int flag)
vconf = venc_drv->vdata->vconf;
if (flag) {
if (venc_drv->vdata->venc_type == VENC_TYPE_ENCP) {
/* clk source sel: fckl_div5 */
vout_clk_setb(vconf->vid_clk_div_reg, 0xf, VCLK_XD0, 8);
usleep_range(5, 6);
vout_clk_setb(vconf->vid_clk_ctrl_reg, 6, VCLK_CLK_IN_SEL, 3);
vout_clk_setb(vconf->vid_clk_ctrl_reg, 1, VCLK_EN0, 1);
usleep_range(5, 6);
vout_clk_setb(vconf->vid_clk_div_reg, 0, ENCP_CLK_SEL, 4);
vout_clk_setb(vconf->vid_clk_div_reg, 1, VCLK_XD_EN, 1);
usleep_range(5, 6);
vout_clk_setb(vconf->vid_clk_ctrl_reg, 1, VCLK_DIV1_EN, 1);
vout_clk_setb(vconf->vid_clk_ctrl_reg, 1, VCLK_SOFT_RST, 1);
usleep_range(10, 11);
vout_clk_setb(vconf->vid_clk_ctrl_reg, 0, VCLK_SOFT_RST, 1);
usleep_range(5, 6);
vout_clk_setb(vconf->vid_clk_ctrl2_reg, 1, ENCP_GATE_VCLK, 1);
return;
}
/* clk source sel: fckl_div5 */
vout_clk_setb(vconf->vid2_clk_div_reg, 0xf, VCLK2_XD, 8);
usleep_range(5, 6);