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lcd: fix txhd2 mlvds pll setting [2/2]

Browse Source 
PD#SWPL-155351

Problem:
TXHD2 mlvds phy sample problem

Solution:
TXHD2 fix pll tcon div setting

Verify:
TXHD2 BE311

Change-Id: I0c8faa2a3fc9b70576d5fc31bd26b42eadba4a5a
Signed-off-by: huijie.huang <huijie.huang@amlogic.com>
This commit is contained in:
huijie.huang
2024-01-22 14:57:33 +08:00
committed by gerrit autosubmit
parent 8a7af85a49
commit 4bc205fe84
1 changed files with 9 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/media/vout/lcd/lcd_clk/lcd_clk_tl1_tm2_t5_t5d.c
+9 -4
View File
@@ -384,22 +384,27 @@ static void lcd_pll_reset_txhd2(struct aml_lcd_drv_s *pdrv)
static void lcd_set_pll_txhd2(struct aml_lcd_drv_s *pdrv)
{
struct lcd_clk_config_s *cconf;
unsigned int pll_ctrl, pll_ctrl1;
unsigned int pll_ctrl, pll_ctrl1, pll_ctrl5;
unsigned int tcon_div_sel;
int ret, cnt = 0;
cconf = get_lcd_clk_config(pdrv);
if (!cconf)
return;
tcon_div_sel = cconf->pll_tcon_div_sel;
pll_ctrl =
(cconf->pll_n << 10) |
(cconf->pll_m << 0) |
(cconf->pll_od1_sel << 16) |
(cconf->pll_od2_sel << 18) |
(cconf->pll_od3_sel << 20) |
(3 << 24);
(tcon_div[tcon_div_sel][1] << 22) |
(tcon_div[tcon_div_sel][2] << 24) |
(1 << 25);
pll_ctrl1 = cconf->pll_frac;
pll_ctrl5 = 0x00150500 | (tcon_div[tcon_div_sel][0] << 0);
lcd_ana_write(HHI_TCON_PLL_CNTL0, 1 << 29);
lcd_ana_write(HHI_TCON_PLL_CNTL0, pll_ctrl);
@@ -408,13 +413,13 @@ set_pll_retry_txhd2:
lcd_ana_write(HHI_TCON_PLL_CNTL2, 0x01000000);
lcd_ana_write(HHI_TCON_PLL_CNTL3, 0x00258000);
lcd_ana_write(HHI_TCON_PLL_CNTL4, 0x05501000);
lcd_ana_write(HHI_TCON_PLL_CNTL5, 0x00150500);
lcd_ana_write(HHI_TCON_PLL_CNTL5, pll_ctrl5);
lcd_ana_write(HHI_TCON_PLL_CNTL6, 0x50450000);
udelay(10);
lcd_ana_setb(HHI_TCON_PLL_CNTL0, 1, 28, 1);
udelay(10);
lcd_ana_setb(HHI_TCON_PLL_CNTL0, 1, 29, 1);
lcd_ana_setb(HHI_TCON_PLL_CNTL0, 0, 24, 2);
lcd_ana_setb(HHI_TCON_PLL_CNTL0, 0, 25, 1);
lcd_ana_setb(HHI_TCON_PLL_CNTL0, 1, 23, 1);
udelay(10);
lcd_ana_setb(HHI_TCON_PLL_CNTL0, 1, 15, 1);