amvecm: amlogic-5.15-dev-u Coverity defect [1/1]

PD#SWPL-191075

Problem:
amlogic-5.15-dev-u Coverity defect

Solution:
fix coverity error

Verify:
verify on t5m

Change-Id: I7e0ecbb9695b6d0033851666a9a555f97cc13529
Signed-off-by: zhan.wang <zhan.wang@amlogic.com>
This commit is contained in:
zhan.wang
2024-11-08 07:00:37 +00:00
committed by gerrit autosubmit
parent 1be4341c02
commit 4e05c368c4
2 changed files with 17 additions and 55 deletions
+15 -38
View File
@@ -4294,11 +4294,8 @@ void ve_size_info_update(int vpp_index)
reg_offset = lc_reg_ofst[0];
lc_reg = VPP_LC1_CURVE_HV_NUM + reg_offset;
if (rdma_mode)
VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg,
(h_num << 8) | v_num, vpp_index);
else
WRITE_VPP_REG_S5(lc_reg, (h_num << 8) | v_num);
VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg,
(h_num << 8) | v_num, vpp_index);
lc_reg = VPP_LC1_CURVE_LMT_RAT + reg_offset;
tmp = READ_VPP_REG_S5(lc_reg);
@@ -4308,24 +4305,15 @@ void ve_size_info_update(int vpp_index)
blackbar_mute_thrd = tmp >> 3;
lc_reg = VPP_LC1_CURVE_HISTVLD_THRD + reg_offset;
if (rdma_mode)
VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, histvld_thrd, vpp_index);
else
WRITE_VPP_REG_S5(lc_reg, histvld_thrd);
VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, histvld_thrd, vpp_index);
lc_reg = VPP_LC1_CURVE_BB_MUTE_THRD + reg_offset;
if (rdma_mode)
VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, blackbar_mute_thrd,
vpp_index);
else
WRITE_VPP_REG_S5(lc_reg, blackbar_mute_thrd);
VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, blackbar_mute_thrd,
vpp_index);
tmp = ((height - 1) << 16) | (width - 1);
if (rdma_mode)
VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS1_WIDTHM1_HEIGHTM1,
tmp, vpp_index);
else
WRITE_VPP_REG_S5(VPP_LC_STTS1_WIDTHM1_HEIGHTM1, tmp);
VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS1_WIDTHM1_HEIGHTM1,
tmp, vpp_index);
if (multi_slice_type) {
height = pps_dout_vsize[1];
@@ -4340,24 +4328,15 @@ void ve_size_info_update(int vpp_index)
blackbar_mute_thrd = tmp >> 3;
lc_reg = VPP_LC1_CURVE_HISTVLD_THRD + reg_offset;
if (rdma_mode)
VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, histvld_thrd, vpp_index);
else
WRITE_VPP_REG_S5(lc_reg, histvld_thrd);
VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, histvld_thrd, vpp_index);
lc_reg = VPP_LC1_CURVE_BB_MUTE_THRD + reg_offset;
if (rdma_mode)
VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, blackbar_mute_thrd,
vpp_index);
else
WRITE_VPP_REG_S5(lc_reg, blackbar_mute_thrd);
VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, blackbar_mute_thrd,
vpp_index);
tmp = ((height - 1) << 16) | (width - 1);
if (rdma_mode)
VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS2_WIDTHM1_HEIGHTM1,
tmp, vpp_index);
else
WRITE_VPP_REG_S5(VPP_LC_STTS2_WIDTHM1_HEIGHTM1, tmp);
VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS2_WIDTHM1_HEIGHTM1,
tmp, vpp_index);
/*tmp = (width / 12) & 0xff;*/
tmp = width / 12 + width / 72 - 3;
@@ -4365,11 +4344,9 @@ void ve_size_info_update(int vpp_index)
tmp = 0xff;
tmp = (0x1 << 3) | (tmp << 16);
if (rdma_mode)
VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS_CTRL1,
tmp, vpp_index);
else
WRITE_VPP_REG_S5(VPP_LC_STTS_CTRL1, tmp);
VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS_CTRL1,
tmp, vpp_index);
} else {
reg_offset = lc_reg_ofst[1];
lc_reg = VPP_LC1_CURVE_CTRL + reg_offset;
@@ -2694,10 +2694,6 @@ void lc_process(struct vframe_s *vf,
set_lc_curve(1, 0, vpp_index);
} else {
ve_lc_curve_set(1, 0, lc_szcurve, 0, vpp_index);
if (multi_slice_flag)
ve_lc_curve_set(1, 0, lc_szcurve, 1, vpp_index);
else if (multi_pic_flag)
ve_lc_curve_set(1, 0, lc_szcurve_slice1, 1, vpp_index);
}
lc_bypass_flag++;
@@ -2722,8 +2718,7 @@ void lc_process(struct vframe_s *vf,
if (set_lc_curve(0, 0, vpp_index))
pr_amlc_dbg("[%s] set lc curve fail\n", __func__);
} else {
if (!multi_slice_flag)
ve_lc_mapping_ctrl(lc_en, lc_rdma_mode, vpp_index);
ve_lc_mapping_ctrl(lc_en, lc_rdma_mode, vpp_index);
ve_lc_blk_num_get(&blk_hnum, &blk_vnum, 0);
@@ -2741,23 +2736,13 @@ void lc_process(struct vframe_s *vf,
/*do time domain iir*/
lc_fw_curve_iir(vf, lc_hist,
lc_szcurve, blk_vnum, blk_hnum);
if (multi_pic_flag)
lc_fw_curve_iir(vf, lc_hist_slice1,
lc_szcurve_slice1, blk_vnum, blk_hnum);
if (lc_curve_prcnt > 0) { /*debug lc curve node*/
lc_prt_curve();
lc_curve_prcnt--;
}
if (!multi_pic_flag) {
ve_lc_curve_set(0, lc_demo_mode, lc_szcurve, 0, vpp_index);
if (multi_slice_flag)
ve_lc_curve_set(0, lc_demo_mode, lc_szcurve, 1, vpp_index);
} else {
ve_lc_curve_set(0, 0, lc_szcurve, 0, vpp_index);
ve_lc_curve_set(0, 0, lc_szcurve_slice1, 1, vpp_index);
}
ve_lc_curve_set(0, lc_demo_mode, lc_szcurve, 0, vpp_index);
}
if (amlc_debug == 0xc &&