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amvecm: amlogic-5.15-dev-u Coverity defect [1/1]
PD#SWPL-191075 Problem: amlogic-5.15-dev-u Coverity defect Solution: fix coverity error Verify: verify on t5m Change-Id: I7e0ecbb9695b6d0033851666a9a555f97cc13529 Signed-off-by: zhan.wang <zhan.wang@amlogic.com>
This commit is contained in:
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gerrit autosubmit
parent
1be4341c02
commit
4e05c368c4
@@ -4294,11 +4294,8 @@ void ve_size_info_update(int vpp_index)
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reg_offset = lc_reg_ofst[0];
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lc_reg = VPP_LC1_CURVE_HV_NUM + reg_offset;
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if (rdma_mode)
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VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg,
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(h_num << 8) | v_num, vpp_index);
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else
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WRITE_VPP_REG_S5(lc_reg, (h_num << 8) | v_num);
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VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg,
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(h_num << 8) | v_num, vpp_index);
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lc_reg = VPP_LC1_CURVE_LMT_RAT + reg_offset;
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tmp = READ_VPP_REG_S5(lc_reg);
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@@ -4308,24 +4305,15 @@ void ve_size_info_update(int vpp_index)
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blackbar_mute_thrd = tmp >> 3;
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lc_reg = VPP_LC1_CURVE_HISTVLD_THRD + reg_offset;
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if (rdma_mode)
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VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, histvld_thrd, vpp_index);
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else
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WRITE_VPP_REG_S5(lc_reg, histvld_thrd);
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VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, histvld_thrd, vpp_index);
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lc_reg = VPP_LC1_CURVE_BB_MUTE_THRD + reg_offset;
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if (rdma_mode)
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VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, blackbar_mute_thrd,
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vpp_index);
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else
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WRITE_VPP_REG_S5(lc_reg, blackbar_mute_thrd);
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VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, blackbar_mute_thrd,
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vpp_index);
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tmp = ((height - 1) << 16) | (width - 1);
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if (rdma_mode)
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VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS1_WIDTHM1_HEIGHTM1,
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tmp, vpp_index);
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else
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WRITE_VPP_REG_S5(VPP_LC_STTS1_WIDTHM1_HEIGHTM1, tmp);
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VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS1_WIDTHM1_HEIGHTM1,
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tmp, vpp_index);
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if (multi_slice_type) {
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height = pps_dout_vsize[1];
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@@ -4340,24 +4328,15 @@ void ve_size_info_update(int vpp_index)
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blackbar_mute_thrd = tmp >> 3;
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lc_reg = VPP_LC1_CURVE_HISTVLD_THRD + reg_offset;
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if (rdma_mode)
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VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, histvld_thrd, vpp_index);
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else
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WRITE_VPP_REG_S5(lc_reg, histvld_thrd);
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VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, histvld_thrd, vpp_index);
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lc_reg = VPP_LC1_CURVE_BB_MUTE_THRD + reg_offset;
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if (rdma_mode)
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VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, blackbar_mute_thrd,
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vpp_index);
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else
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WRITE_VPP_REG_S5(lc_reg, blackbar_mute_thrd);
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VSYNC_WRITE_VPP_REG_VPP_SEL(lc_reg, blackbar_mute_thrd,
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vpp_index);
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tmp = ((height - 1) << 16) | (width - 1);
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if (rdma_mode)
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VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS2_WIDTHM1_HEIGHTM1,
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tmp, vpp_index);
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else
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WRITE_VPP_REG_S5(VPP_LC_STTS2_WIDTHM1_HEIGHTM1, tmp);
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VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS2_WIDTHM1_HEIGHTM1,
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tmp, vpp_index);
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/*tmp = (width / 12) & 0xff;*/
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tmp = width / 12 + width / 72 - 3;
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@@ -4365,11 +4344,9 @@ void ve_size_info_update(int vpp_index)
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tmp = 0xff;
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tmp = (0x1 << 3) | (tmp << 16);
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if (rdma_mode)
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VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS_CTRL1,
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tmp, vpp_index);
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else
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WRITE_VPP_REG_S5(VPP_LC_STTS_CTRL1, tmp);
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VSYNC_WRITE_VPP_REG_VPP_SEL(VPP_LC_STTS_CTRL1,
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tmp, vpp_index);
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} else {
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reg_offset = lc_reg_ofst[1];
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lc_reg = VPP_LC1_CURVE_CTRL + reg_offset;
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@@ -2694,10 +2694,6 @@ void lc_process(struct vframe_s *vf,
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set_lc_curve(1, 0, vpp_index);
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} else {
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ve_lc_curve_set(1, 0, lc_szcurve, 0, vpp_index);
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if (multi_slice_flag)
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ve_lc_curve_set(1, 0, lc_szcurve, 1, vpp_index);
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else if (multi_pic_flag)
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ve_lc_curve_set(1, 0, lc_szcurve_slice1, 1, vpp_index);
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}
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lc_bypass_flag++;
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@@ -2722,8 +2718,7 @@ void lc_process(struct vframe_s *vf,
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if (set_lc_curve(0, 0, vpp_index))
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pr_amlc_dbg("[%s] set lc curve fail\n", __func__);
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} else {
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if (!multi_slice_flag)
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ve_lc_mapping_ctrl(lc_en, lc_rdma_mode, vpp_index);
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ve_lc_mapping_ctrl(lc_en, lc_rdma_mode, vpp_index);
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ve_lc_blk_num_get(&blk_hnum, &blk_vnum, 0);
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@@ -2741,23 +2736,13 @@ void lc_process(struct vframe_s *vf,
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/*do time domain iir*/
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lc_fw_curve_iir(vf, lc_hist,
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lc_szcurve, blk_vnum, blk_hnum);
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if (multi_pic_flag)
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lc_fw_curve_iir(vf, lc_hist_slice1,
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lc_szcurve_slice1, blk_vnum, blk_hnum);
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if (lc_curve_prcnt > 0) { /*debug lc curve node*/
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lc_prt_curve();
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lc_curve_prcnt--;
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}
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if (!multi_pic_flag) {
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ve_lc_curve_set(0, lc_demo_mode, lc_szcurve, 0, vpp_index);
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if (multi_slice_flag)
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ve_lc_curve_set(0, lc_demo_mode, lc_szcurve, 1, vpp_index);
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} else {
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ve_lc_curve_set(0, 0, lc_szcurve, 0, vpp_index);
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ve_lc_curve_set(0, 0, lc_szcurve_slice1, 1, vpp_index);
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}
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ve_lc_curve_set(0, lc_demo_mode, lc_szcurve, 0, vpp_index);
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}
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if (amlc_debug == 0xc &&
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