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NNA: switch adla core clk parent [1/1]

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PD#SWPL-162745

Problem:
std suspend:
clk tree save config clk_parent0;
adla core --> switch to clk_parent1

std resume:
clk tree restore config clk_parent0;

Solution:
std suspend:
adla clk switch to clk_parent1;
adla power off;
clk tree save config clk_parent1;

adla resume
adla tree restore config clk_parent1;
adla power on;
adla clk switch to clk_parent0;

Verify:
T7c

Change-Id: I74ac279eb4316461e28f9b9e396a41948f5cf85a
Signed-off-by: Cancan.chang <cancan.chang@amlogic.com>
This commit is contained in:
Cancan Chang
2024-04-01 10:38:47 +00:00
committed by Luan Yuan
parent 40022782cf
commit 4e06c16913
1 changed files with 9 additions and 3 deletions
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arch/arm64/boot/dts/amlogic/mesont7c.dtsi
+9 -3
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@@ -393,12 +393,18 @@
reg-names = "adla_reg\0adla_sram";
interrupt-names = "adla";
interrupts = <0 185 4>;
clocks = <&clkc CLKID_ANAKIN_CLK>;
clock-names = "adla_core_clk";
clocks = <&clkc CLKID_ANAKIN_CLK>,
<&clkc CLKID_ANAKIN>,
<&clkc CLKID_ANAKIN_0>,
<&clkc CLKID_ANAKIN_1>;
clock-names = "adla_core_clk",
"adla_clk",
"adla_clk_parent0",
"adla_clk_parent1";
assigned-clocks =<&clkc CLKID_ANAKIN_0_MUX>,
<&clkc CLKID_ANAKIN>,
<&clkc CLKID_ANAKIN_CLK>;
assigned-clock-parentsd = <&clkc CLKID_FCLK_DIV2P5>,
assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>,
<&clkc CLKID_ANAKIN_0>,
<0>;
assigned-clock-rates = <0>,