dvfs: fix clock warning when first scaling from high rate to low [1/1]

PD#SWPL-83545

Problem:
there is warning when cpufreq scaling from 1200M to 512M

Solution:
sync sys pll enable count

Verify:
a1

Change-Id: Ie974e7d10abdb60fec15ab776fa522c143477b61
Signed-off-by: Jian Hu <jian.hu@amlogic.com>

drivers/cpufreq/meson-cpufreq.c

@@ -21,6 +21,7 @@
 #include <linux/topology.h>
 #include <linux/regulator/consumer.h>
 #include <linux/delay.h>
+#include <linux/string.h>
 #include <linux/regulator/driver.h>
 #include "internal.h"
 #include "opp.h"
@@ -826,6 +827,14 @@ static int meson_cpufreq_init(struct cpufreq_policy *policy)
 		pr_debug("%s: ignor dsu pre parent2 clk!\n", __func__);
 	}
 
+	/*
+	 * Make pair with clk_disable_unprepare(high_freq_clk_p)
+	 * when cpu cpufreq first scaling from high rate to low rate
+	 */
+	if (!strcmp(__clk_get_name(clk_get_parent(clk[cur_cluster])),
+		__clk_get_name(high_freq_clk_p)) && __clk_is_enabled(high_freq_clk_p))
+		clk_prepare_enable(high_freq_clk_p);
+
 	cpufreq_voltage_set_skip = of_property_read_bool(np,
 							 "cpufreq_voltage_set_skip");
 	reg_use_buck[cur_cluster] = of_property_read_bool(np,