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clk: t5m: add gp0 pll for vpu clk [1/1]

Browse Source 
PD#SWPL-164903

Problem:
vpu needs gp0 clk

Solution:
add gp0 config for vpu

Verify:
T5m

Change-Id: If96777c011a2dcff3105cd278f926332b669d8c7
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
This commit is contained in:
Jian Hu
2024-03-08 07:09:39 +00:00
committed by gerrit autosubmit
parent 933ab59012
commit 57d41e01d2
1 changed files with 8 additions and 3 deletions
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drivers/clk/meson/t5m.c
+8 -3
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@@ -2914,18 +2914,22 @@ static struct clk_regmap t5m_hevcb = {
},
};
static u32 t5m_vpu_table[] = { 0, 1, 2, 3, 4};
static const struct clk_hw *t5m_vpu_parent_hws[] = {
&t5m_fclk_div3.hw,
&t5m_fclk_div4.hw,
&t5m_fclk_div5.hw,
&t5m_fclk_div7.hw
&t5m_fclk_div7.hw,
&t5m_gp0_pll.hw
};
static struct clk_regmap t5m_vpu_0_sel = {
.data = &(struct clk_regmap_mux_data){
.offset = CLKCTRL_VPU_CLK_CTRL,
.mask = 0x3,
.mask = 0x7,
.shift = 9,
.table = t5m_vpu_table
},
.hw.init = &(struct clk_init_data){
.name = "vpu_0_sel",
@@ -2967,8 +2971,9 @@ static struct clk_regmap t5m_vpu_0 = {
static struct clk_regmap t5m_vpu_1_sel = {
.data = &(struct clk_regmap_mux_data){
.offset = CLKCTRL_VPU_CLK_CTRL,
.mask = 0x3,
.mask = 0x7,
.shift = 25,
.table = t5m_vpu_table
},
.hw.init = &(struct clk_init_data){
.name = "vpu_1_sel",