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amlbian: hdmi only sync dts to t7c [1/1]

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PD#SWPL-142978

Problem:
sync hdmi only version dts to t7c.

Solution:
sync hdmi only version dts to t7c.

Verify:
local

Signed-off-by: yi.zhang1 <yi.zhang1@amlogic.com>
Change-Id: Ia4861dc13e1de8d30d69b45501b5035ea5e5b6b3
This commit is contained in:
yi.zhang1
2023-10-19 13:45:46 +08:00
committed by gerrit autosubmit
parent 57eb1e3c82
commit 6b10ea47ff
1 changed files with 34 additions and 84 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm64/boot/dts/amlogic/t7c_a311d2_an400_linux_drm_hdmitx_only_debian.dts
+34 -84
View File
@@ -202,6 +202,7 @@
alignment = <0x0 0x100000>;
alloc-ranges = <0x0 0x0 0x0 0xe0000000>;
};
dmaheap_cma_reserved:heap-gfx {
compatible = "shared-dma-pool";
reusable;
@@ -1439,56 +1440,26 @@
pinctrl-0 = <&i2c2_pins3>;
//pinctrl-1 = <&i2c2_sleep_pins2>;
clock-frequency = <100000>; /* default 100k */
imx290_2: sensor1@1a {
compatible = "sony, imx290","sony, imx415";
amlsens_0: sensor0@1a {
compatible = "amlogic, sensor";
index = <0>;
reg = <0x1a>;
reg-addr-type = <2>;
reg-data-type = <1>;
clocks = <&clkc CLKID_MCLK_0>,
<&clkc CLKID_MCLK_0_SEL>,
<&clkc CLKID_MCLK_0_PRE>,
<&clkc CLKID_MCLK_PLL>,
<&xtal>;
clock-names = "mclk","mclk_pre","mclk_p","mclk_x";
pwdn = <&gpio GPIOM_5 GPIO_ACTIVE_HIGH>;
reset = <&gpio GPIOM_11 GPIO_ACTIVE_HIGH>;
ports {
port@0 {
imx290_2_ep: endpoint {
data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <222750000>;
remote-endpoint = <&csiphy0_ep>;
};
};
port@1 {
imx415_4_ep: endpoint {
data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <1440000000>;
remote-endpoint = <&csiphy0_ep_4>;
};
};
};
};
ov08a10_0: sensor2@36 {
compatible = "omini, ov08a10";
index = <1>;
reg = <0x36>;
reg-addr-type = <2>;
reg-data-type = <1>;
clocks = <&clkc CLKID_MCLK_0>,
<&clkc CLKID_MCLK_0_PRE>,
<&clkc CLKID_MCLK_PLL>,
<&xtal>;
clock-names = "mclk","mclk_pre","mclk_p","mclk_x";
pwdn = <&gpio GPIOM_5 GPIO_ACTIVE_HIGH>;
reset = <&gpio GPIOM_11 GPIO_ACTIVE_HIGH>;
clock-names = "mclk","mclk_sel","mclk_pre","mclk_p","mclk_x";
pwdn-gpios = <&gpio GPIOM_5 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio GPIOM_11 GPIO_ACTIVE_HIGH>;
port {
ov08a10_0_ep: endpoint {
amlsens_0_ep: endpoint {
data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <1440000000>;
remote-endpoint = <&csiphy0_ep_2>;
link-frequencies = /bits/ 64 <222750000>;
remote-endpoint = <&csiphy0_ep>;
};
};
};
@@ -1499,27 +1470,26 @@
pinctrl-names = "default";//, "sleep"
pinctrl-0 = <&i2c3_pins1>;
clock-frequency = <100000>; /* default 100k */
imx290_1: sensor2@1a {
compatible = "sony, imx290";
index = <0>;
amlsens_2: sensor2@1a {
compatible = "amlogic, sensor";
index = <2>;
reg = <0x1a>;
reg-addr-type = <2>;
reg-data-type = <1>;
clocks = <&clkc CLKID_MCLK_1>,
<&clkc CLKID_MCLK_1_SEL>,
<&clkc CLKID_MCLK_1_PRE>,
<&clkc CLKID_MCLK_PLL>,
<&xtal>;
clock-names = "mclk","mclk_pre","mclk_p","mclk_x";
pwdn = <&gpio GPIOM_4 GPIO_ACTIVE_HIGH>;
reset = <&gpio GPIOM_9 GPIO_ACTIVE_HIGH>;
ports {
port@0 {
imx290_1_ep: endpoint {
data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <222750000>;
remote-endpoint = <&csiphy2_ep>;
};
clock-names = "mclk","mclk_sel","mclk_pre","mclk_p","mclk_x";
pwdn-gpios = <&gpio GPIOM_4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio GPIOM_10 GPIO_ACTIVE_HIGH>;
port {
amlsens_2_ep: endpoint {
data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <222750000>;
remote-endpoint = <&csiphy2_ep>;
};
};
};
@@ -1621,30 +1591,12 @@
};
&csiphy0 {
ports {
port@0 {
csiphy0_ep_2: endpoint {
status = "disable"
clock-lanes = <4>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&ov08a10_0_ep>;
};
};
port@1 {
csiphy0_ep: endpoint {
status = "okay";
clock-lanes = <4>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&imx290_2_ep>;
};
};
port@2 {
csiphy0_ep_4: endpoint {
status = "disable"
clock-lanes = <4>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&imx415_4_ep>;
};
port {
csiphy0_ep: endpoint {
status = "okay";
clock-lanes = <4>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&amlsens_0_ep>;
};
};
};
@@ -1658,14 +1610,12 @@
};
&csiphy2 {
ports {
port@0 {
csiphy2_ep: endpoint {
status = "okay";
clock-lanes = <4>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&imx290_1_ep>;
};
port {
csiphy2_ep: endpoint {
status = "okay";
clock-lanes = <4>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&amlsens_2_ep>;
};
};
};