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amvecm: lc effect not sync for t3x [1/1]

Browse Source 
PD#SWPL-140807

Problem:
lc effect not sync for 2 slice.

Solution:
modify code flow for settings sync.

Verify:
t3x

Change-Id: I223271b29f2446079975528ce1710e5515e7a184
Signed-off-by: qinghui.jiang <qinghui.jiang@amlogic.com>
This commit is contained in:
qinghui.jiang
2023-09-22 02:22:11 +00:00
committed by gerrit autosubmit
parent 002d7d1ef1
commit 6b5c88f828
5 changed files with 486 additions and 136 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/media/enhancement/amvecm/am_dma_ctrl.c
+10 -4
View File
@@ -62,6 +62,7 @@ struct _dma_reg_cfg_s {
unsigned char reg_wrmif0_badr0;
unsigned char reg_wrmif0_badr1;
unsigned char reg_wrmif_sel;
unsigned char reg_sr_mode_l2c1;
};
struct _viu_dma_reg_cfg_s {
@@ -77,6 +78,7 @@ static struct _dma_reg_cfg_s dma_reg_cfg = {
0xde,
0xdf,
0xee,
0xa2,
};
static struct _viu_dma_reg_cfg_s viu_dma_reg_cfg = {
@@ -179,13 +181,13 @@ static void _set_vpu_lut_dma_mif_wr_unit(int enable,
void am_dma_init(void)
{
/*lut_dma_wr initial*/
lut_dma_wr[EN_DMA_WR_ID_LC_STTS_0].stride = 12;
lut_dma_wr[EN_DMA_WR_ID_LC_STTS_0].stride = 48;
lut_dma_wr[EN_DMA_WR_ID_LC_STTS_0].addr_mode = 1;
lut_dma_wr[EN_DMA_WR_ID_LC_STTS_0].rpt_num = 32;
lut_dma_wr[EN_DMA_WR_ID_LC_STTS_0].rpt_num = 8;
lut_dma_wr[EN_DMA_WR_ID_LC_STTS_1].stride = 12;
lut_dma_wr[EN_DMA_WR_ID_LC_STTS_1].stride = 48;
lut_dma_wr[EN_DMA_WR_ID_LC_STTS_1].addr_mode = 1;
lut_dma_wr[EN_DMA_WR_ID_LC_STTS_1].rpt_num = 32;
lut_dma_wr[EN_DMA_WR_ID_LC_STTS_1].rpt_num = 8;
lut_dma_wr[EN_DMA_WR_ID_VI_HIST_SPL_0].stride = 22;
lut_dma_wr[EN_DMA_WR_ID_VI_HIST_SPL_0].addr_mode = 3;
@@ -285,6 +287,10 @@ void am_dma_set_mif_wr_status(int enable)
pr_am_dma("%s: addr = %x, enable = %d\n",
__func__, addr, enable);
addr = ADDR_PARAM(dma_reg_cfg.page,
dma_reg_cfg.reg_sr_mode_l2c1);
WRITE_VPP_REG_S5(addr, 0x00420000);
}
void am_dma_set_mif_wr(enum lut_dma_wr_id_e dma_wr_id,
drivers/media/enhancement/amvecm/amve_v2.c
+382 -79
View File
@@ -41,10 +41,18 @@ int dnlp_slice_num_changed;
module_param(dnlp_slice_num_changed, int, 0644);
MODULE_PARM_DESC(dnlp_slice_num_changed, "dnlp_slice_num_changed for t3x");
int lc_slice_num_changed;
module_param(lc_slice_num_changed, int, 0644);
MODULE_PARM_DESC(lc_slice_num_changed, "lc_slice_num_changed for t3x");
int hist_dma_case = 1;
module_param(hist_dma_case, int, 0644);
MODULE_PARM_DESC(hist_dma_case, "hist_dma_case for t3x");
int dump_lc_curve;
module_param(dump_lc_curve, int, 0644);
MODULE_PARM_DESC(dump_lc_curve, "dump_lc_curve for t3x");
static int vev2_dbg;
module_param(vev2_dbg, int, 0644);
MODULE_PARM_DESC(vev2_dbg, "ve dbg after s5");
@@ -78,7 +86,12 @@ unsigned int lc_reg_ofst[4] = {
};
int lc_h_count_ini_phs;
unsigned int lc_overlap = 64;/*32;*/
unsigned int lc_overlap_s0 = 32;
module_param(lc_overlap_s0, int, 0644);
MODULE_PARM_DESC(lc_overlap_s0, "lc_overlap_s0");
unsigned int lc_overlap = 32;
module_param(lc_overlap, int, 0644);
MODULE_PARM_DESC(lc_overlap, "lc_overlap");
@@ -998,11 +1011,13 @@ void get_luma_hist(struct vframe_s *vf)
(!vi_hist_en || dnlp_slice_num_changed)) {
vpp_luma_hist_en(slice_case);
dnlp_slice_num_changed = 0;
pr_amve_v2("%s: dnlp_slice_num_changed 1->0\n",
__func__);
}
if (vd_info) {
if (slice_case)
overlap = 64;
overlap = 32;
else
overlap = 0;
@@ -1291,6 +1306,7 @@ int ve_multi_slice_case_get(void)
if (slice_case != multi_slice_case) {
multi_slice_case = slice_case;
dnlp_slice_num_changed = 1;
lc_slice_num_changed = 1;
}
return slice_case;
@@ -1996,28 +2012,150 @@ static void _lc_mtrx_set(enum lc_mtx_sel_e mtrx_sel,
static void _lc_blk_bdry_cfg(unsigned int height,
unsigned int width, int h_num, int v_num, int rdma_mode)
{
int i;
int slice_max;
int lc_reg;
unsigned int value;
int slice_case;
unsigned int tmp;
int slice_case = ve_multi_slice_case_get();
width /= h_num;
height /= v_num;
slice_case = ve_multi_slice_case_get();
if (slice_case)
slice_max = get_slice_max();
else
slice_max = SLICE1;
/*lc curve mapping block IDX default 4k panel*/
for (i = SLICE0; i < slice_max; i++) {
/*slice0*/
lc_reg = VPP_SRSHARP1_LC_CURVE_BLK_HIDX_0_1 +
sr_sharp_reg_ofst[0];
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= width & GET_BITS(0, 14);
value |= (0 << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (width * 3) & GET_BITS(0, 14);
value |= ((width * 2) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (width * 5) & GET_BITS(0, 14);
value |= ((width * 4) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
if (slice_case)
value |= (width * 6 - lc_overlap) & GET_BITS(0, 14);
else
value |= (width * 7) & GET_BITS(0, 14);
value |= ((width * 6) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
if (slice_case) {
value |= (width * 8) & GET_BITS(0, 14);
value |= ((width * 7) << 16) & GET_BITS(16, 14);
} else {
value |= (width * 9) & GET_BITS(0, 14);
value |= ((width * 8) << 16) & GET_BITS(16, 14);
}
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (width * 11) & GET_BITS(0, 14);
value |= ((width * 10) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = READ_VPP_REG_S5(lc_reg);
value &= 0xffffc000;
value |= (width * h_num) & GET_BITS(0, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg = VPP_SRSHARP1_LC_CURVE_BLK_VIDX_0_1 +
sr_sharp_reg_ofst[0];
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= height & GET_BITS(0, 14);
value |= (0 << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (height * 3) & GET_BITS(0, 14);
value |= ((height * 2) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (height * 5) & GET_BITS(0, 14);
value |= ((height * 4) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (height * 7) & GET_BITS(0, 14);
value |= ((height * 6) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = READ_VPP_REG_S5(lc_reg);
value &= 0xffffc000;
value |= (height * v_num) & GET_BITS(0, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
/*slice1*/
if (slice_case) {
lc_reg = VPP_SRSHARP1_LC_CURVE_BLK_HIDX_0_1 +
sr_sharp_reg_ofst[i];
value = width & GET_BITS(0, 14);
sr_sharp_reg_ofst[1];
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= lc_overlap & GET_BITS(0, 14);
value |= (0 << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
@@ -2025,64 +2163,69 @@ static void _lc_blk_bdry_cfg(unsigned int height,
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = (width * 3) & GET_BITS(0, 14);
value |= ((width * 2) << 16) & GET_BITS(16, 14);
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (width * 2 + lc_overlap) & GET_BITS(0, 14);
value |= ((width * 1 + lc_overlap) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = (width * 5) & GET_BITS(0, 14);
value |= ((width * 4) << 16) & GET_BITS(16, 14);
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (width * 4 + lc_overlap) & GET_BITS(0, 14);
value |= ((width * 3 + lc_overlap) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = (width * 7) & GET_BITS(0, 14);
value |= ((width * 6) << 16) & GET_BITS(16, 14);
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (width * 6 + lc_overlap) & GET_BITS(0, 14);
value |= ((width * 5 + lc_overlap) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = (width * 9) & GET_BITS(0, 14);
value |= ((width * 8) << 16) & GET_BITS(16, 14);
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (width * 8 + lc_overlap) & GET_BITS(0, 14);
value |= ((width * 7 + lc_overlap) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = (width * 11) & GET_BITS(0, 14);
value |= ((width * 10) << 16) & GET_BITS(16, 14);
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (width * 10 + lc_overlap) & GET_BITS(0, 14);
value |= ((width * 9 + lc_overlap) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = (width * h_num) & GET_BITS(0, 14);
if (slice_case && i == SLICE1) {
tmp = (h_num >> 1) - 1;
value |= (tmp << 16) & GET_BITS(16, 4);
tmp = (h_num >> 1) - 2;
value |= (tmp << 20) & GET_BITS(20, 4);
value |= (0x1 << 25);
if (width * 11 >= lc_h_count_ini_phs)
value |= (0x1 << 24);
}
value = READ_VPP_REG_S5(lc_reg);
value &= 0xffffc000;
value |= (width * h_num) & GET_BITS(0, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg = VPP_SRSHARP1_LC_CURVE_BLK_VIDX_0_1 +
sr_sharp_reg_ofst[i];
value = height & GET_BITS(0, 14);
sr_sharp_reg_ofst[1];
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= height & GET_BITS(0, 14);
value |= (0 << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
@@ -2090,7 +2233,9 @@ static void _lc_blk_bdry_cfg(unsigned int height,
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = (height * 3) & GET_BITS(0, 14);
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (height * 3) & GET_BITS(0, 14);
value |= ((height * 2) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
@@ -2098,7 +2243,9 @@ static void _lc_blk_bdry_cfg(unsigned int height,
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = (height * 5) & GET_BITS(0, 14);
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (height * 5) & GET_BITS(0, 14);
value |= ((height * 4) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
@@ -2106,7 +2253,9 @@ static void _lc_blk_bdry_cfg(unsigned int height,
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = (height * 7) & GET_BITS(0, 14);
value = READ_VPP_REG_S5(lc_reg);
value &= 0xc000c000;
value |= (height * 7) & GET_BITS(0, 14);
value |= ((height * 6) << 16) & GET_BITS(16, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
@@ -2114,13 +2263,9 @@ static void _lc_blk_bdry_cfg(unsigned int height,
WRITE_VPP_REG_S5(lc_reg, value);
lc_reg += 1;
value = (height * v_num) & GET_BITS(0, 14);
if (slice_case && i == SLICE1) {
tmp = width * 11 - lc_h_count_ini_phs;
/*if (tmp < 0)*/
/* tmp *= (-1);*/
value |= (tmp << 16) & GET_BITS(16, 14);
}
value = READ_VPP_REG_S5(lc_reg);
value &= 0xffffc000;
value |= (height * v_num) & GET_BITS(0, 14);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
@@ -2390,31 +2535,36 @@ void ve_lc_stts_en(int enable,
int slice_max;
int data32;
int tmp = 0x1;
int slice_hsize = width;
int slice0_hsize = width;
int slice1_hsize = width;
int slice_case = ve_multi_slice_case_get();
if (slice_case || multi_picture_case) {
tmp = 0x3;
slice_max = get_slice_max();
slice_hsize = (width >> 1) + lc_overlap;
slice0_hsize = (width >> 1) + lc_overlap_s0;
slice1_hsize = (width >> 1) + lc_overlap;
} else {
slice_max = SLICE1;
}
/*WRITE_VPP_REG_S5(VPP_LC_STTS_GCLK_CTRL0, 0x0);*/
data32 = ((height - 1) << 16) | (slice_hsize - 1);
if (rdma_mode) {
data32 = ((height - 1) << 16) | (slice0_hsize - 1);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(VPP_LC_STTS1_WIDTHM1_HEIGHTM1,
data32);
VSYNC_WRITE_VPP_REG(VPP_LC_STTS2_WIDTHM1_HEIGHTM1,
data32);
} else {
else
WRITE_VPP_REG_S5(VPP_LC_STTS1_WIDTHM1_HEIGHTM1,
data32);
data32 = ((height - 1) << 16) | (slice1_hsize - 1);
if (rdma_mode)
VSYNC_WRITE_VPP_REG(VPP_LC_STTS2_WIDTHM1_HEIGHTM1,
data32);
else
WRITE_VPP_REG_S5(VPP_LC_STTS2_WIDTHM1_HEIGHTM1,
data32);
}
/*lc lpf enable*/
if (lpf_en) {
@@ -2694,30 +2844,40 @@ void ve_lc_top_cfg(int enable, int h_num, int v_num,
int slice_max;
int lc_reg;
unsigned int value;
int tmp;
int data32;
int sync_ctrl = 0; /*0: pre_frame, 1: cur_frame*/
int slice_case = ve_multi_slice_case_get();
unsigned int hsize_out, hwin_begin, hwin_end;
if (slice_case || multi_picture_case)
slice_max = get_slice_max();
else
slice_max = SLICE1;
if (slice_case) {
value = READ_VPP_REG_S5(V2_VD_S1_HWIN_CUT);
hwin_begin = (value >> 16) & 0x1fff;
hwin_end = value & 0x1fff;
hsize_out = READ_VPP_REG_S5(V2_VD_PROC_S1_OUT_SIZE);
hsize_out = (hsize_out >> 16) & 0x1fff;
lc_overlap = hsize_out - (hwin_end - hwin_begin + 1);
lc_overlap_s0 = lc_overlap;
pr_amve_v2("[lc_overlap]%d/%d/h_out:%d/w_b:%d/w_e:%d\n",
lc_overlap_s0, lc_overlap,
hsize_out, hwin_begin, hwin_end);
}
/*lc curve mapping block IDX default 4k panel*/
for (i = SLICE0; i < slice_max; i++) {
lc_reg = VPP_SRSHARP1_LC_HV_NUM +
sr_sharp_reg_ofst[i];
value = READ_VPP_REG_S5(lc_reg);
value &= 0xffffe0e0;
/*lc ram write h num and v num*/
value = v_num & GET_BITS(0, 5);
value |= v_num & GET_BITS(0, 5);
value |= (h_num << 8) & GET_BITS(8, 5);
if (slice_case && i == SLICE1) {
tmp = (width >> 1) + lc_overlap;
tmp = (width - tmp) << 1;
value |= (tmp << 16) & GET_BITS(16, 13);
lc_h_count_ini_phs = tmp;
}
if (rdma_mode)
VSYNC_WRITE_VPP_REG(lc_reg, value);
else
@@ -2978,6 +3138,9 @@ void ve_lc_curve_set(int init_flag,
int h_num, v_num;
unsigned int tmp, tmp1;
unsigned int lnr_data, lnr_data1;
unsigned int offset = 0;
unsigned int shift = 0;
int slice_case = ve_multi_slice_case_get();
if (!init_flag && !data)
return;
@@ -3018,6 +3181,9 @@ void ve_lc_curve_set(int init_flag,
return;
}
if (slice == 1)
offset = 5;
VSYNC_WRITE_VPP_REG(ctrl_reg, 1);
VSYNC_WRITE_VPP_REG(addr_reg, 0);
@@ -3026,7 +3192,14 @@ void ve_lc_curve_set(int init_flag,
switch (demo_mode) {
case 0:/*off*/
default:
k = 6 * (i * h_num + j);
if (slice_case &&
slice == 0 &&
j > 5)
shift = 1;
else
shift = 0;
k = 6 * (i * h_num + j + offset - shift);
tmp = data[k + 0] |
(data[k + 1] << 10) |
(data[k + 2] << 20);
@@ -3186,11 +3359,11 @@ void ve_lc_region_read(int blk_vnum, int blk_hnum,
int *curve_data, int *hist_data)
{
int slice_max;
int lc_reg;
int ctrl_reg;
int addr_reg;
int data_reg;
int i, j;
unsigned int lc_reg;
unsigned int ctrl_reg;
unsigned int addr_reg;
unsigned int data_reg;
unsigned int i, j;
unsigned int tmp, tmp1;
unsigned int cur_block;
unsigned int length = 1632; /*12*8*17*/
@@ -3246,12 +3419,81 @@ void ve_lc_region_read(int blk_vnum, int blk_hnum,
am_dma_get_mif_data_lc_stts(slice, hist_data, length);
}
void dump_lc_mapping_reg(void)
{
int i;
int slice = 0;
int slice_max = 0;
int ctrl_reg;
int addr_reg;
int data_reg;
unsigned int ret_data, ret_data1;
slice_max = get_slice_max();
for (slice = SLICE0; slice < slice_max; slice++) {
pr_info("########## slice[%d] curve data ###########\n",
slice);
ctrl_reg = VPP_SRSHARP1_LC_MAP_RAM_CTRL +
sr_sharp_reg_ofst[slice];
addr_reg = VPP_SRSHARP1_LC_MAP_RAM_ADDR +
sr_sharp_reg_ofst[slice];
data_reg = VPP_SRSHARP1_LC_MAP_RAM_DATA +
sr_sharp_reg_ofst[slice];
WRITE_VPP_REG_S5(ctrl_reg, 1);
WRITE_VPP_REG_S5(addr_reg, 0 | (1 << 31));
for (i = 0; i < 12 * 8; i++) {
ret_data = READ_VPP_REG_S5(data_reg);
ret_data1 = READ_VPP_REG_S5(data_reg);
pr_info("[%d] %d/%d\n", i, ret_data, ret_data1);
}
WRITE_VPP_REG_S5(ctrl_reg, 0);
}
}
void dump_lc_reg(void)
{
int i;
unsigned int tmp;
int lc_reg;
pr_info("multi_slice_case=%d\n", multi_slice_case);
pr_info("hist_dma_case=%d\n", hist_dma_case);
pr_info("lc_overlap_s0=%d\n", lc_overlap_s0);
pr_info("lc_overlap=%d\n", lc_overlap);
if (vd_info) {
pr_info("vd_info slice_num=%d\n", vd_info->slice_num);
pr_info("vd1_in_hsize=%d\n", vd_info->vd1_in_hsize);
pr_info("vd1_in_vsize=%d\n", vd_info->vd1_in_vsize);
pr_info("vd1_dout_hsize=%d\n", vd_info->vd1_dout_hsize);
pr_info("vd1_dout_vsize=%d\n", vd_info->vd1_dout_vsize);
pr_info("slice[0].hsize=%d\n",
vd_info->slice[0].hsize);
pr_info("slice[0].vsize=%d\n",
vd_info->slice[0].vsize);
pr_info("slice[0].scaler_in_hsize=%d\n",
vd_info->slice[0].scaler_in_hsize);
pr_info("slice[1].hsize=%d\n",
vd_info->slice[1].hsize);
pr_info("slice[1].vsize=%d\n",
vd_info->slice[1].vsize);
pr_info("slice[1].scaler_in_hsize=%d\n",
vd_info->slice[1].scaler_in_hsize);
}
lc_reg = 0x5257;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x7757;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x282e;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
@@ -3286,14 +3528,6 @@ void dump_lc_reg(void)
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
}
lc_reg = 0x5257;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x7757;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
for (i = 0; i < 2; i++) {
lc_reg = 0x52c0 + i;
tmp = READ_VPP_REG_S5(lc_reg);
@@ -3326,6 +3560,75 @@ void dump_lc_reg(void)
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
}
if (dump_lc_curve) {
for (i = 0; i < 96; i++) {
lc_reg = 0x52fd;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x52fe;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x77fd;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x77fe;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
}
}
lc_reg = 0x2811;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x3202;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x3203;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x3204;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x3207;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x3201;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x3241;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x2809;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x280a;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x280b;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x2808;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x2813;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
lc_reg = 0x28c5;
tmp = READ_VPP_REG_S5(lc_reg);
pr_info("[0x%04x]=0x%08x\n", lc_reg, tmp);
}
void dump_dnlp_reg(void)
drivers/media/enhancement/amvecm/amve_v2.h
+3
View File
@@ -10,6 +10,8 @@
extern int multi_picture_case;
extern int multi_slice_case;
extern int hist_dma_case;
extern unsigned int lc_overlap;
extern int lc_slice_num_changed;
struct cm_port_s {
int cm_addr_port[4];
@@ -104,6 +106,7 @@ void ve_lc_base_init(void);
void ve_lc_region_read(int blk_vnum, int blk_hnum,
int slice, int *black_count,
int *curve_data, int *hist_data);
void dump_lc_mapping_reg(void);
void dump_lc_reg(void);
void dump_dnlp_reg(void);
drivers/media/enhancement/amvecm/arch/vpp_regs_v2.h
+18
View File
@@ -771,6 +771,9 @@
#define VPP_SRSHARP0_PK_NR_EN 0x5027
#define VPP_SRSHARP1_PK_NR_EN 0x5227
#define VPP_SR2_SHARP_PROC_1R 0x5257
#define VPP_SR2_SHARP_PROC_1R_S1 0x7757
#define VPP_SRSHARP1_DNLP_EN 0x5245
#define VPP_SRSHARP1_DNLP_00 0x5290
#define VPP_SRSHARP1_LC_INPUT_MUX 0x52b1
@@ -839,6 +842,21 @@
#define VPP_LC_STTS_BLACK_INFO2 0x5aee
#define VPP_LC_STTS_DMA_ERROR_RO 0x5aef
#define V2_VD_PROC_S1_OUT_SIZE 0x2808
#define V2_VD_PROC_S1_PPS_IN_SIZE 0x2809
#define V2_VD_PROC_S1_SR0_IN_SIZE 0x280a
#define V2_VD_PROC_S1_SR1_IN_SIZE 0x280b
#define V2_VD_PROC_BYPASS_CTRL 0x2811
#define V2_VD_S1_HWIN_CUT 0x2813
#define V2_VD_PPS_CTRL 0x28c5
#define V2_VPP_VD_PREBLND_H_V_SIZE 0x3201
#define V2_VPP_VD_PREBLND_CTRL 0x3202
#define V2_VPP_PREBLEND_VD1_H_START_END 0x3203
#define V2_VPP_PREBLEND_VD1_V_START_END 0x3204
#define V2_VD1_PREBLEND_SRC_CTRL 0x3207
#define V2_VPP_VD_PRE_BLEND_DUMMY_DATA 0x3241
#define VPP_LUT3D_CTRL 0x2540
#define VPP_LUT3D_CBUS2RAM_CTRL 0x2541
#define VPP_LUT3D_RAM_ADDR 0x2542
drivers/media/enhancement/amvecm/local_contrast.c
+73 -53
View File
@@ -35,11 +35,13 @@
/*curve_node_total*/
#define LC_HIST_SIZE 1632
/*curve_node_total*/
#define LC_CURV_SIZE 580
#define LC_CURV_SIZE 585
/*history message delay*/
#define N 4
/*hist bin num*/
#define HIST_BIN 16
#define LC_BLK_H_NUM 12
#define LC_BLK_V_NUM 8
int amlc_debug;
module_param(amlc_debug, int, 0664);
@@ -65,7 +67,14 @@ int lc_rdma_mode;
module_param(lc_rdma_mode, int, 0664);
MODULE_PARM_DESC(lc_rdma_mode, "\n lc_rdma_mode\n");
int lc_skip_iir;
module_param(lc_skip_iir, int, 0664);
MODULE_PARM_DESC(lc_skip_iir, "\n lc_skip_iir\n");
int lc_demo_mode;
module_param(lc_demo_mode, int, 0664);
MODULE_PARM_DESC(lc_demo_mode, "\n lc_demo_mode\n");
int lc_en_chflg = 0xff;
static int lc_flag = 0xff;
static int lc_bypass_flag = 0xff;
@@ -93,8 +102,8 @@ unsigned int lc_hist_ve;
unsigned int lc_hist_hs;
unsigned int lc_hist_he;
/*lc curve data and hist data*/
int *lc_szcurve;/*12*8*6+4*/
int *lc_szcurve_slice1;/*12*8*6+4*/
int *lc_szcurve;/*12*8*6+9*/
int *lc_szcurve_slice1;/*12*8*6+9*/
int *curve_nodes_cur;
static int *curve_nodes_pre;
static s64 *curve_nodes_pre_raw;
@@ -878,8 +887,8 @@ static void lc_config(int enable,
static unsigned int sps_w_in_pre, sps_h_in_pre;
unsigned int flag, flag_full;
h_num = 12;
v_num = 8;
h_num = LC_BLK_H_NUM;
v_num = LC_BLK_V_NUM;
if (!vf) {
vf_height = 0;
@@ -888,11 +897,13 @@ static void lc_config(int enable,
return;
}
pr_amlc_dbg("sps_h_en/v_en/h_in/w_in: %d/%d/%d/%d\n",
sps_h_en,
sps_v_en,
sps_h_in,
sps_w_in);
if (chip_type_id == chip_t3x &&
vf->source_type == VFRAME_SOURCE_TYPE_HWC) {
vf_height = 0;
vf_width = 0;
pr_amlc_dbg("%s: VFRAME_SOURCE_TYPE_HWC\n", __func__);
return;
}
/* try to detect out of spec signal level */
flag_full = 0;
@@ -922,12 +933,20 @@ static void lc_config(int enable,
flag_full == flag_full_pre &&
sps_w_in_pre == sps_w_in &&
sps_h_in_pre == sps_h_in &&
lc_en_chflg) {
lc_en_chflg && !lc_slice_num_changed) {
pr_amlc_dbg("%s: lc_en_chflg = %d\n",
__func__, lc_en_chflg);
return;
}
pr_amlc_dbg("sps_h_en/v_en/h_in/w_in: %d/%d/%d/%d\n",
sps_h_en,
sps_v_en,
sps_h_in,
sps_w_in);
pr_amlc_dbg("vf->height/width: %d/%d\n",
vf->height, vf->width);
flag_full_pre = flag_full;
height = sps_h_in << sps_h_en;
width = sps_w_in << sps_v_en;
@@ -939,6 +958,14 @@ static void lc_config(int enable,
lc_en_chflg = 0xff;
if (chip_type_id == chip_t3x) {
if (lc_slice_num_changed) {
lc_slice_num_changed = 0;
pr_amlc_dbg("%s: lc_slice_num_changed 1->0\n",
__func__);
}
}
/*
* bit 29: present_flag
* bit 23-16: color_primaries
@@ -966,7 +993,6 @@ static void lc_config(int enable,
lc_stts_en(enable, height, width,
0, 0, 1, 1, 4,
bitdepth, flag, flag_full);
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
} else {
ve_lc_curve_ctrl_cfg(enable,
height, width, h_num, v_num, lc_rdma_mode);
@@ -976,7 +1002,6 @@ static void lc_config(int enable,
0, 0, 1, 1, 0,
bitdepth, flag, flag_full,
lc_tune_curve.lc_reg_thd_black, lc_rdma_mode);
#endif
}
}
@@ -1658,14 +1683,16 @@ static void lc_fw_curve_iir(struct vframe_s *vf,
int refresh = 1 << refresh_bit;
int temp1, temp2;
if (!vf)
if (!vf || lc_skip_iir)
return;
if (!lc_curve_fresh)
goto stop_curvefresh;
/* pre: get curve nodes from szCurveInfo and save to curve_nodes_cur*/
for (i = 0; i < 580; i++)/*12*8*6+4*/
curve_nodes_cur[i] = lc_szcurve[i];
/* pre: osd flag delay*/
osd_flag_cnt_below[0] = osd_flag_cnt_below[1];
osd_flag_cnt_above[0] = osd_flag_cnt_above[1];
@@ -1692,13 +1719,11 @@ static void lc_fw_curve_iir(struct vframe_s *vf,
&frm_cnt_below,/*out: osd case heavy iir time */
lc_hist,
blk_hnum);
/*step 2: scene change signal get: two method*/
scene_change_flag = global_scene_change(curve_nodes_cur,
curve_nodes_pre,
blk_vnum,
blk_hnum,
osd_flag_cnt_above,
osd_flag_cnt_below);
curve_nodes_pre, blk_vnum, blk_hnum,
osd_flag_cnt_above, osd_flag_cnt_below);
if (scene_change_flag) {
memset(osd_flag_cnt_below, 0, sizeof(int) * 2);
memset(osd_flag_cnt_above, 0, sizeof(int) * 2);
@@ -1708,21 +1733,13 @@ static void lc_fw_curve_iir(struct vframe_s *vf,
/* step 3: set tiir alpha based on different situation */
cal_iir_alpha(refresh_alpha,/*out*/
blk_vnum,
blk_hnum,
refresh,
scene_change_flag,
frm_cnt_above,
frm_cnt_below);
blk_vnum, blk_hnum, refresh,
scene_change_flag, frm_cnt_above, frm_cnt_below);
/* step 4: iir filter */
cal_curv_iir(curve_nodes_cur,/*out: iir-ed curve*/
/*out: store previous frame curve */
curve_nodes_pre,
refresh_alpha,
blk_vnum,
blk_hnum,
refresh);
curve_nodes_pre,/*out: store previous frame curve */
refresh_alpha, blk_vnum, blk_hnum, refresh);
if (amlc_debug == 0xc &&
lc_node_prcnt > 0) {
@@ -1841,8 +1858,6 @@ void lc_read_region(int blk_vnum, int blk_hnum,
int *data_curve;
int *data_hist;
pr_amlc_dbg("%s: slice = %d", __func__, slice);
if (chip_type_id != chip_t3x) {
_read_region(blk_vnum, blk_hnum);
data_hist = lc_hist;
@@ -1930,8 +1945,8 @@ void lc_init(int bitdepth)
height = vinfo->height;
width = vinfo->width;
h_num = 12;
v_num = 8;
h_num = LC_BLK_H_NUM;
v_num = LC_BLK_V_NUM;
if (!lc_szcurve)
lc_szcurve = kcalloc(LC_CURV_SIZE, sizeof(int), GFP_KERNEL);
@@ -2128,13 +2143,12 @@ void lc_process(struct vframe_s *vf,
unsigned int sps_h_in)
{
int blk_hnum, blk_vnum;
int multi_pic_flag;
int multi_slice_flag;
if (get_cpu_type() < MESON_CPU_MAJOR_ID_TL1)
return;
pr_amlc_dbg("%s: chip_type_id = %d",
__func__, chip_type_id);
if (chip_type_id == chip_s5)
return;
@@ -2165,6 +2179,16 @@ void lc_process(struct vframe_s *vf,
return;
}
if (vf->source_type == VFRAME_SOURCE_TYPE_HWC) {
pr_amlc_dbg("\n[%s] HWC skip.\n", __func__);
return;
}
if (chip_type_id == chip_t3x) {
multi_pic_flag = ve_multi_picture_case_get();
multi_slice_flag = ve_multi_slice_case_get();
}
lc_config(lc_en, vf, sps_h_en, sps_v_en,
sps_w_in, sps_h_in, lc_bitdepth);
@@ -2173,7 +2197,9 @@ void lc_process(struct vframe_s *vf,
set_lc_curve(1, 0);
} else {
ve_lc_curve_set(1, 0, lc_szcurve, 0);
if (ve_multi_picture_case_get())
if (multi_slice_flag)
ve_lc_curve_set(1, 0, lc_szcurve, 1);
else if (multi_pic_flag)
ve_lc_curve_set(1, 0, lc_szcurve_slice1, 1);
}
@@ -2198,23 +2224,23 @@ void lc_process(struct vframe_s *vf,
if (set_lc_curve(0, 0))
pr_amlc_dbg("%s: set lc curve fail\n", __func__);
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
} else {
ve_lc_blk_num_get(&blk_hnum, &blk_vnum, 0);
/*get hist & curve node*/
pr_amlc_dbg("%s: use_lc_curve_isr/defined: %d/%d\n",
__func__, use_lc_curve_isr, lc_curve_isr_defined);
if (!use_lc_curve_isr || !lc_curve_isr_defined) {
lc_read_region(blk_vnum, blk_hnum, 0);
if (ve_multi_picture_case_get())
if (multi_pic_flag)
lc_read_region(blk_vnum, blk_hnum, 1);
} else {
pr_amlc_dbg("%s: use_lc_curve_isr/defined: %d/%d\n",
__func__, use_lc_curve_isr, lc_curve_isr_defined);
}
/*do time domain iir*/
lc_fw_curve_iir(vf, lc_hist,
lc_szcurve, blk_vnum, blk_hnum);
if (ve_multi_picture_case_get())
if (multi_pic_flag)
lc_fw_curve_iir(vf, lc_hist_slice1,
lc_szcurve_slice1, blk_vnum, blk_hnum);
@@ -2223,20 +2249,16 @@ void lc_process(struct vframe_s *vf,
lc_curve_prcnt--;
}
if (!ve_multi_picture_case_get()) {
if (!multi_pic_flag) {
ve_lc_curve_set(0, lc_demo_mode, lc_szcurve, 0);
if (multi_slice_flag)
ve_lc_curve_set(0, lc_demo_mode, lc_szcurve, 1);
} else {
ve_lc_curve_set(0, 0, lc_szcurve, 0);
ve_lc_curve_set(0, 0, lc_szcurve_slice1, 1);
}
#endif
}
pr_amlc_dbg("blk_hnum = %d, blk_vnum = %d",
blk_hnum, blk_vnum);
pr_amlc_dbg("%s: lc_demo_mode = %d",
__func__, lc_demo_mode);
if (amlc_debug == 0xc &&
lc_node_prcnt > 0) {
lc_node_prcnt--;
@@ -2256,12 +2278,10 @@ void lc_free(void)
kfree(curve_nodes_pre_raw);
kfree(lc_hist);
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
if (chip_type_id == chip_t3x) {
kfree(lc_szcurve_slice1);
kfree(lc_hist_slice1);
}
#endif
lc_malloc_ok = 0;
}