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https://github.com/hardkernel/kernel_common_drivers.git
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audio: bt pin error [1/1]
PD#SWPL-169197 Problem: 1. bt can not work, tdm pin name error Solution: 1. add pin control Verify: Ross Ref201 Change-Id: I7fe8253915b12e562a020720f2a6c9e877b65b49 Signed-off-by: qing.zhang <qing.zhang@amlogic.com> Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
This commit is contained in:
@@ -158,13 +158,18 @@
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compatible = "amlogic, t5-snd-tdma";
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#sound-dai-cells = <0>;
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dai-tdm-lane-slot-mask-in = <1 1>;
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dai-tdm-lane-slot-mask-out = <1 1>;
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dai-tdm-lane-slot-mask-in = <1 0>;
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dai-tdm-lane-slot-mask-out = <0 1>;
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dai-tdm-clk-sel = <0>;
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clocks = <&clkaudio CLKID_AUDIO_MCLK_A
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&clkc CLKID_HIFI_PLL
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&clkc CLKID_HIFI1_PLL>;
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clock-names = "mclk", "clk_srcpll", "clk_src_cd";
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pinctrl-names = "tdm_pins";
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pinctrl-0 = <&tdm_a_pins
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&tdm_d0_pins
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&tdm_d1_pins
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&tdma_clk_pins>;
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suspend-clk-off = <1>;
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/* enable control gain */
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ctrl_gain = <1>;
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@@ -528,18 +533,30 @@
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}; /* end of audiobus */
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&periphs_pinctrl {
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tdm_a_pins: tdm_a_pins {
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mux { /* GPIOX_11, GPIOX_10, GPIOX_8, GPIOX_9 */
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groups = "tdm_sclk0",
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"tdm_fs0",
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"tdm_d0",
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"tdm_d1";
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function = "tdm";
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};
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};
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spdif_out_a_h4_pins: spdifout_a_h4 {
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mux { /* GPIOH_4 */
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groups = "spdif_out_h4";
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function = "spdif";
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};
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};
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spdifin: spdifin {
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mux {/* GPIOH_9 */
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groups = "spdif_in_h9";
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function = "spdif";
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};
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};
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spdif_out_a_h4_mute_pins: spdifout_a_h4_mute {
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mux { /* GPIOH_4 */
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groups = "GPIOH_4";
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@@ -567,6 +584,27 @@
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};
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&pinctrl_audio {
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tdm_d0_pins: tdm_d0_pin {
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mux {
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groups = "tdm_d0";
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function = "tdmouta_lane1";
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};
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};
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tdm_d1_pins: tdm_d1_pin {
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mux {
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groups = "tdm_d1";
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function = "tdmina_lane0";
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};
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};
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tdma_clk_pins: tdm_clk_pin {
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mux {
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groups = "tdm_sclk0", "tdm_lrclk0";
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function = "tdm_clk_outa";
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};
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};
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tdm_d2_pins: tdm_d2_pin {
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mux {
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groups = "tdm_d2";
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@@ -940,40 +940,7 @@
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status = "okay";
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};
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&pinctrl_audio {
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tdm_d0_pins: tdm_d0_pin {
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mux {
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groups = "tdm_d0";
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function = "tdmouta_lane0";
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};
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};
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tdm_d1_pins: tdm_d1_pin {
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mux {
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groups = "tdm_d1";
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function = "tdmina_lane0";
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};
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};
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tdma_clk_pins: tdm_clk_pin {
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mux {
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groups = "tdm_sclk0", "tdm_lrclk0";
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function = "tdm_clk_outa";
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};
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};
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};
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&periphs_pinctrl {
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tdm_a: tdm_a {
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mux { /* GPIOX_11, GPIOX_10, GPIOX_8, GPIOX_9 */
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groups = "tdm_sclk0",
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"tdm_fs0",
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"tdm_d0",
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"tdm_d1";
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function = "tdm";
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};
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};
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dvb_s_ts0_pins: dvb_s_ts0_pins {
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tsin_a {
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groups = "tsin_a_sop",
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@@ -814,40 +814,7 @@
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status = "okay";
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};
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&pinctrl_audio {
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tdm_d0_pins: tdm_d0_pin {
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mux {
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groups = "tdm_d0";
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function = "tdmouta_lane0";
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};
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};
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tdm_d1_pins: tdm_d1_pin {
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mux {
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groups = "tdm_d1";
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function = "tdmina_lane0";
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};
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};
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tdma_clk_pins: tdm_clk_pin {
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mux {
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groups = "tdm_sclk0", "tdm_lrclk0";
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function = "tdm_clk_outa";
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};
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};
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};
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&periphs_pinctrl {
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tdm_a: tdm_a {
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mux { /* GPIOX_11, GPIOX_10, GPIOX_8, GPIOX_9 */
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groups = "tdm_sclk0",
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"tdm_fs0",
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"tdm_d0",
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"tdm_d1";
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function = "tdm";
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};
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};
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dvb_s_ts0_pins: dvb_s_ts0_pins {
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tsin_a {
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groups = "tsin_a_sop",
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@@ -924,40 +924,7 @@
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status = "okay";
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};
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&pinctrl_audio {
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tdm_d0_pins: tdm_d0_pin {
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mux {
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groups = "tdm_d0";
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function = "tdmouta_lane0";
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};
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};
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tdm_d1_pins: tdm_d1_pin {
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mux {
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groups = "tdm_d1";
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function = "tdmina_lane0";
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};
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};
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tdma_clk_pins: tdm_clk_pin {
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mux {
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groups = "tdm_sclk0", "tdm_lrclk0";
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function = "tdm_clk_outa";
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};
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};
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};
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&periphs_pinctrl {
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tdm_a: tdm_a {
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mux { /* GPIOX_11, GPIOX_10, GPIOX_8, GPIOX_9 */
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groups = "tdm_sclk0",
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"tdm_fs0",
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"tdm_d0",
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"tdm_d1";
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function = "tdm";
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};
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};
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dvb_s_ts0_pins: dvb_s_ts0_pins {
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tsin_a {
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groups = "tsin_a_sop",
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