vin: optimise module_param [2/2]

PD#SWPL-195504

Problem:
There are too many module_param in vin module.

Solution:
optimise module_param

Verify:
sc2

Change-Id: I126076f1934a1914904fa2643482a36bd71d3f61
Signed-off-by: Gaowei Zhao <gaowei.zhao@amlogic.com>
This commit is contained in:
Gaowei Zhao
2025-08-06 06:59:07 +00:00
committed by gerrit autosubmit
parent 40dc221866
commit 86fbb4fe1a
13 changed files with 32 additions and 102 deletions
@@ -169,14 +169,6 @@ u32 top_irq_tab[IRQ_TYPE_CNT];
static DEFINE_SPINLOCK(rx_pr_lock);
DECLARE_WAIT_QUEUE_HEAD(query_wait);
int hdmi_yuv444_enable = 1;
module_param(hdmi_yuv444_enable, int, 0664);
MODULE_PARM_DESC(hdmi_yuv444_enable, "hdmi_yuv444_enable");
int pc_mode_en;
MODULE_PARM_DESC(pc_mode_en, "\n pc_mode_en\n");
module_param(pc_mode_en, int, 0664);
bool downstream_repeat_support;
MODULE_PARM_DESC(downstream_repeat_support, "\n downstream_repeat_support\n");
module_param(downstream_repeat_support, bool, 0664);
@@ -86,6 +86,7 @@
//2024.10.09 t3x/t7c hdmirx support std hibernate
//2024.11.15 add protect for fsm
//2024.11.29 optimize early suspend flow
//2024.12.26 clean module params
//2025.01.02 optimize timer execution logic
//2025.01.16 t3 hdmirx support std hibernate
//2025.02.20 add 4k144 165 dsc timing support
@@ -39,8 +39,6 @@ enum eq_sts_e eq_sts[4] = {E_EQ_START, E_EQ_START, E_EQ_START, E_EQ_START};
/* variable define*/
int long_cable_best_setting = 6;
int delay_ms_cnt = 5; /* 5 */
MODULE_PARM_DESC(delay_ms_cnt, "\n delay_ms_cnt\n");
module_param(delay_ms_cnt, int, 0664);
int eq_max_setting = 7;
int eq_dbg_ch0;
@@ -107,9 +107,6 @@ int rx22_ver;
MODULE_PARM_DESC(rx22_ver, "\n rx22_ver\n");
module_param(rx22_ver, int, 0664);
MODULE_PARM_DESC(force_clk_rate, "\n force_clk_rate\n");
module_param(force_clk_rate, int, 0664);
/* test for HBR CTS, audio module can set it to force 8ch */
int hbr_force_8ch;
/*
@@ -34,8 +34,6 @@
#include "hdmi_rx_hw_t5m.h"
int bist_delay = 5000;
MODULE_PARM_DESC(bist_delay, "\n bist_delay\n");
module_param(bist_delay, int, 0664);
/* for T5m */
u32 top_irq_mask_t5m[IRQ_TYPE_CNT] = {
@@ -73,6 +73,7 @@ extern u32 cdr_value;
extern u32 eq_value;
extern u32 misc2_value;
extern u32 misc1_value;
extern int bist_delay;
/*--------------------------function declare------------------*/
/* T5m */
void aml_phy_init_t5m(void);
@@ -31,16 +31,8 @@
#include "hdmi_rx_wrapper.h"
#include "hdmi_rx_edid.h"
#include "hdmi_rx_hw_t7.h"
/*edid original data from device*/
static unsigned char receive_edid[MAX_RECEIVE_EDID];
int receive_edid_len = MAX_RECEIVE_EDID;
MODULE_PARM_DESC(receive_edid, "\n receive_edid\n");
module_param_array(receive_edid, byte, &receive_edid_len, 0664);
int tx_hpd_event;
int edid_len;
MODULE_PARM_DESC(edid_len, "\n edid_len\n");
module_param(edid_len, int, 0664);
bool new_edid;
/*original bksv from device*/
//unsigned char receive_hdcp[MAX_KSV_LIST_SIZE];
//int hdcp_array_len = MAX_KSV_LIST_SIZE;
@@ -48,18 +40,8 @@ bool new_edid;
//module_param_array(receive_hdcp, byte, &hdcp_array_len, 0664);
int hdcp_len;
int hdcp_repeat_depth;
bool new_hdcp;
bool start_auth_14;
MODULE_PARM_DESC(start_auth_14, "\n start_auth_14\n");
module_param(start_auth_14, bool, 0664);
bool repeat_plug;
MODULE_PARM_DESC(repeat_plug, "\n repeat_plug\n");
module_param(repeat_plug, bool, 0664);
int up_phy_addr;/*d c b a 4bit*/
MODULE_PARM_DESC(up_phy_addr, "\n up_phy_addr\n");
module_param(up_phy_addr, int, 0664);
int hdcp22_firm_switch_timeout;
u8 ksvlist[10] = {
@@ -75,11 +57,10 @@ u8 ksvlist[10] = {
void rx_start_repeater_auth(void)
{
rx[rx_info.main_port].hdcp.state = REPEATER_STATE_START;
start_auth_14 = 1;
rx[rx_info.main_port].hdcp.delay = 0;
hdcp_len = 0;
hdcp_repeat_depth = 0;
rx[rx_info.main_port].hdcp.state = REPEATER_STATE_START;
rx[rx_info.main_port].hdcp.delay = 0;
rx[rx_info.main_port].hdcp.dev_exceed = 0;
rx[rx_info.main_port].hdcp.cascade_exceed = 0;
rx[rx_info.main_port].hdcp.depth = 0;
@@ -294,11 +275,6 @@ void rx_check_repeat(u8 port)
}
}
unsigned char *rx_get_dw_edid_addr(void)
{
return receive_edid;
}
bool get_rx_active_sts(void)
{
return rx_info.main_port_open;
@@ -308,7 +284,6 @@ EXPORT_SYMBOL(get_rx_active_sts);
void rx_set_repeater_support(bool enable)
{
downstream_repeat_support = enable;
repeat_plug = enable;
rx_pr("****************=%d\n", downstream_repeat_support);
}
EXPORT_SYMBOL(rx_set_repeater_support);
@@ -6,8 +6,6 @@
#ifndef __HDMIRX_REPEATER__
#define __HDMIRX_REPEATER__
/* EDID */
#define MAX_RECEIVE_EDID 40/*33*/
#define MAX_HDR_LUMI 3
#define MAX_KSV_SIZE 5
#define MAX_REPEAT_DEPTH 7
@@ -62,14 +60,12 @@ struct hdcp_hw_info_s {
unsigned int reserved:15;
};
extern int receive_edid_len;
extern int tx_hpd_event;
extern bool new_edid;
//extern int hdcp_array_len;
extern int hdcp_len;
extern int hdcp_repeat_depth;
extern bool new_hdcp;
extern bool repeat_plug;
extern int up_phy_addr;/*d c b a 4bit*/
//extern unsigned char receive_hdcp[MAX_KSV_LIST_SIZE];
extern u8 ksvlist[10];
+20 -48
View File
@@ -122,6 +122,17 @@ int hpd_wait_dbg;
int dump_aud_max = 1;
int frl_extra_stable_cnt[7] = {0, 20, 20, 20, 20, 60, 60};
int color_depth_t[3] = {8, 10, 12};
int hdcp22_auth_sts = 0xff;
int hdcp14_on;
bool esm_auth_fail_en;
bool hdcp22_esm_reset2;
bool hdcp22_stop_auth;
/*the esm reset flag for hdcp_rx22*/
bool esm_reset_flag;
/* to inform ESM whether the cable is connected or not */
bool video_stable_to_esm;
//static int auds_rcv_sts;
//module_param(auds_rcv_sts, int, 0664);
//MODULE_PARM_DESC(auds_rcv_sts, "auds_rcv_sts");
@@ -135,53 +146,17 @@ bool hdcp22_kill_esm;
MODULE_PARM_DESC(hdcp22_kill_esm, "\n hdcp22_kill_esm\n");
module_param(hdcp22_kill_esm, bool, 0664);
bool hdcp_mode_sel;
MODULE_PARM_DESC(hdcp_mode_sel, "\n hdcp_mode_sel\n");
module_param(hdcp_mode_sel, bool, 0664);
bool esm_auth_fail_en;
MODULE_PARM_DESC(esm_auth_fail_en, "\n esm_auth_fail_en\n");
module_param(esm_auth_fail_en, bool, 0664);
/* to inform hdcp_rx22 whether there's any device connected */
u32 pwr_sts_to_esm;
static int hdcp22_capable_sts = 0xff;
bool esm_error_flag;
/*the esm reset flag for hdcp_rx22*/
bool esm_reset_flag;
MODULE_PARM_DESC(esm_reset_flag, "\n esm_reset_flag\n");
module_param(esm_reset_flag, bool, 0664);
/* to inform ESM whether the cable is connected or not */
bool video_stable_to_esm;
MODULE_PARM_DESC(video_stable_to_esm, "\n video_stable_to_esm\n");
module_param(video_stable_to_esm, bool, 0664);
bool enable_hdcp22_esm_log;
MODULE_PARM_DESC(enable_hdcp22_esm_log, "\n enable_hdcp22_esm_log\n");
module_param(enable_hdcp22_esm_log, bool, 0664);
int hdcp22_auth_sts = 0xff;
MODULE_PARM_DESC(hdcp22_auth_sts, "\n hdcp22_auth_sts\n");
module_param(hdcp22_auth_sts, int, 0664);
bool hdcp22_esm_reset2;
MODULE_PARM_DESC(hdcp22_esm_reset2, "\n hdcp22_esm_reset2\n");
module_param(hdcp22_esm_reset2, bool, 0664);
bool hdcp22_stop_auth;
module_param(hdcp22_stop_auth, bool, 0664);
MODULE_PARM_DESC(hdcp22_stop_auth, "hdcp22_stop_auth");
int hdcp14_on;
MODULE_PARM_DESC(hdcp14_on, "\n hdcp14_on\n");
module_param(hdcp14_on, int, 0664);
/*esm recovery mode for changing resolution & hdmi2.0*/
int esm_recovery_mode = ESM_REC_MODE_TMDS;
module_param(esm_recovery_mode, int, 0664);
MODULE_PARM_DESC(esm_recovery_mode, "esm_recovery_mode");
/* No need to judge frame rate while checking timing stable,as there are
* some out-spec sources whose framerate change a lot(e.g:59.7~60.16hz).
@@ -3094,9 +3069,6 @@ void rx_get_global_variable(const char *buf)
pr_var(vrr_func_en, i++);
pr_var(allm_func_en, i++);
pr_var(qms_func_en, i++);
#ifdef CONFIG_AMLOGIC_HDMITX
pr_var(receive_edid_len, i++);
#endif
pr_var(edid_auto_sel, i++);
//pr_var(hdcp_array_len, i++);
#ifdef CONFIG_AMLOGIC_HDMITX
@@ -3114,6 +3086,9 @@ void rx_get_global_variable(const char *buf)
pr_var(en_4k_timing, i++);
pr_var(acr_mode, i++);
pr_var(force_clk_rate, i++);
pr_var(bist_delay, i++);
pr_var(hdcp22_auth_sts, i++);
pr_var(hdcp14_on, i++);
pr_var(rx_afifo_dbg_en, i++);
pr_var(auto_aclk_mute, i++);
pr_var(aud_avmute_en, i++);
@@ -3125,7 +3100,6 @@ void rx_get_global_variable(const char *buf)
pr_var(packet_fifo_cfg, i++);
pr_var(pd_fifo_start_cnt, i++);
pr_var(hdcp22_on, i++);
pr_var(delay_ms_cnt, i++);
pr_var(eq_max_setting, i++);
pr_var(eq_dbg_ch0, i++);
pr_var(eq_dbg_ch1, i++);
@@ -3416,10 +3390,6 @@ int rx_set_global_variable(const char *buf, int size)
return pr_var(allm_func_en, index);
if (set_pr_var(tmpbuf, var_to_str(qms_func_en), &qms_func_en, value))
return pr_var(qms_func_en, index);
#ifdef CONFIG_AMLOGIC_HDMITX
if (set_pr_var(tmpbuf, var_to_str(receive_edid_len), &receive_edid_len, value))
return pr_var(receive_edid_len, index);
#endif
if (set_pr_var(tmpbuf, var_to_str(edid_auto_sel), &edid_auto_sel, value))
return pr_var(edid_auto_sel, index);
#ifdef CONFIG_AMLOGIC_HDMITX
@@ -3452,6 +3422,12 @@ int rx_set_global_variable(const char *buf, int size)
return pr_var(acr_mode, index);
if (set_pr_var(tmpbuf, var_to_str(force_clk_rate), &force_clk_rate, value))
return pr_var(force_clk_rate, index);
if (set_pr_var(tmpbuf, var_to_str(bist_delay), &bist_delay, value))
return pr_var(bist_delay, index);
if (set_pr_var(tmpbuf, var_to_str(hdcp22_auth_sts), &hdcp22_auth_sts, value))
return pr_var(hdcp22_auth_sts, index);
if (set_pr_var(tmpbuf, var_to_str(hdcp14_on), &hdcp14_on, value))
return pr_var(hdcp14_on, index);
if (set_pr_var(tmpbuf, var_to_str(rx_afifo_dbg_en),
&rx_afifo_dbg_en, value))
return pr_var(rx_afifo_dbg_en, index);
@@ -3475,10 +3451,6 @@ int rx_set_global_variable(const char *buf, int size)
return pr_var(packet_fifo_cfg, index);
if (set_pr_var(tmpbuf, var_to_str(pd_fifo_start_cnt), &pd_fifo_start_cnt, value))
return pr_var(pd_fifo_start_cnt, index);
if (set_pr_var(tmpbuf, var_to_str(hdcp22_on), &hdcp22_on, value))
return pr_var(hdcp22_on, index);
if (set_pr_var(tmpbuf, var_to_str(delay_ms_cnt), &delay_ms_cnt, value))
return pr_var(delay_ms_cnt, index);
if (set_pr_var(tmpbuf, var_to_str(eq_max_setting), &eq_max_setting, value))
return pr_var(eq_max_setting, index);
if (set_pr_var(tmpbuf, var_to_str(eq_dbg_ch0), &eq_dbg_ch0, value))
+1 -3
View File
@@ -77,9 +77,7 @@ static struct meson_tvafe_data *s_tvafe_data;
static struct tvafe_clkgate_type tvafe_clkgate;
static struct tvafe_dev_s *tvafe_dev_local;
static bool enable_db_reg = true;
module_param(enable_db_reg, bool, 0644);
MODULE_PARM_DESC(enable_db_reg, "enable/disable tvafe load reg");
bool enable_db_reg = true;
/*tvconfig snow config*/
static bool snow_cfg;
+1
View File
@@ -101,6 +101,7 @@ extern bool tvafe_signal_stable;
extern bool tvafe_mode;
extern bool demod_is_pal;
extern struct tvafe_avin_det_s *av_dev;
extern bool enable_db_reg;
extern enum tvafe_no_std_config_e force_nostd;
-4
View File
@@ -150,8 +150,6 @@ static unsigned int acd_h = 0x890359;
static unsigned int acd_h_back = 0x890359;
unsigned int acd_ntscm_h_back = 0x00880358;
module_param(acd_ntscm_h_back, uint, 0644);
MODULE_PARM_DESC(acd_ntscm_h_back, "acd_ntscm_h_back");
static unsigned int dec_stop_not_adj = 1;
@@ -211,8 +209,6 @@ unsigned long vbi_mem_start;
bool agc_gain_sts = true;
static int acd_2d_adjust = 0x94;
module_param(acd_2d_adjust, int, 0644);
MODULE_PARM_DESC(acd_2d_adjust, "enable/disable acd_2d_adjust");
void cvd_set_shift_cnt(enum tvafe_cvd2_shift_cnt_e src, unsigned int val)
{
@@ -611,6 +611,11 @@ static ssize_t debug_store(struct device *dev,
tvafe_reset_module();
else if (parm[0][5] == '1')
tvafe_cvd2_hold_rst();
} else if (!strncmp(parm[0], "enable_db_reg", strlen("enable_db_reg"))) {
if (parm[0][13] == '1')
enable_db_reg = 1;
else
enable_db_reg = 0;
} else {
tvafe_pr_info("[%s]:invalid command.\n", __func__);
}