mirror of
https://github.com/hardkernel/kernel_common_drivers.git
synced 2026-06-25 12:03:48 +09:00
vin: optimise module_param [2/2]
PD#SWPL-195504 Problem: There are too many module_param in vin module. Solution: optimise module_param Verify: sc2 Change-Id: I126076f1934a1914904fa2643482a36bd71d3f61 Signed-off-by: Gaowei Zhao <gaowei.zhao@amlogic.com>
This commit is contained in:
committed by
gerrit autosubmit
parent
40dc221866
commit
86fbb4fe1a
@@ -169,14 +169,6 @@ u32 top_irq_tab[IRQ_TYPE_CNT];
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static DEFINE_SPINLOCK(rx_pr_lock);
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DECLARE_WAIT_QUEUE_HEAD(query_wait);
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int hdmi_yuv444_enable = 1;
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module_param(hdmi_yuv444_enable, int, 0664);
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MODULE_PARM_DESC(hdmi_yuv444_enable, "hdmi_yuv444_enable");
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int pc_mode_en;
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MODULE_PARM_DESC(pc_mode_en, "\n pc_mode_en\n");
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module_param(pc_mode_en, int, 0664);
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bool downstream_repeat_support;
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MODULE_PARM_DESC(downstream_repeat_support, "\n downstream_repeat_support\n");
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module_param(downstream_repeat_support, bool, 0664);
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@@ -86,6 +86,7 @@
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//2024.10.09 t3x/t7c hdmirx support std hibernate
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//2024.11.15 add protect for fsm
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//2024.11.29 optimize early suspend flow
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//2024.12.26 clean module params
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//2025.01.02 optimize timer execution logic
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//2025.01.16 t3 hdmirx support std hibernate
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//2025.02.20 add 4k144 165 dsc timing support
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@@ -39,8 +39,6 @@ enum eq_sts_e eq_sts[4] = {E_EQ_START, E_EQ_START, E_EQ_START, E_EQ_START};
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/* variable define*/
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int long_cable_best_setting = 6;
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int delay_ms_cnt = 5; /* 5 */
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MODULE_PARM_DESC(delay_ms_cnt, "\n delay_ms_cnt\n");
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module_param(delay_ms_cnt, int, 0664);
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int eq_max_setting = 7;
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int eq_dbg_ch0;
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@@ -107,9 +107,6 @@ int rx22_ver;
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MODULE_PARM_DESC(rx22_ver, "\n rx22_ver\n");
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module_param(rx22_ver, int, 0664);
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MODULE_PARM_DESC(force_clk_rate, "\n force_clk_rate\n");
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module_param(force_clk_rate, int, 0664);
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/* test for HBR CTS, audio module can set it to force 8ch */
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int hbr_force_8ch;
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/*
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@@ -34,8 +34,6 @@
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#include "hdmi_rx_hw_t5m.h"
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int bist_delay = 5000;
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MODULE_PARM_DESC(bist_delay, "\n bist_delay\n");
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module_param(bist_delay, int, 0664);
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/* for T5m */
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u32 top_irq_mask_t5m[IRQ_TYPE_CNT] = {
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@@ -73,6 +73,7 @@ extern u32 cdr_value;
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extern u32 eq_value;
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extern u32 misc2_value;
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extern u32 misc1_value;
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extern int bist_delay;
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/*--------------------------function declare------------------*/
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/* T5m */
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void aml_phy_init_t5m(void);
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@@ -31,16 +31,8 @@
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#include "hdmi_rx_wrapper.h"
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#include "hdmi_rx_edid.h"
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#include "hdmi_rx_hw_t7.h"
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/*edid original data from device*/
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static unsigned char receive_edid[MAX_RECEIVE_EDID];
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int receive_edid_len = MAX_RECEIVE_EDID;
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MODULE_PARM_DESC(receive_edid, "\n receive_edid\n");
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module_param_array(receive_edid, byte, &receive_edid_len, 0664);
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int tx_hpd_event;
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int edid_len;
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MODULE_PARM_DESC(edid_len, "\n edid_len\n");
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module_param(edid_len, int, 0664);
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bool new_edid;
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/*original bksv from device*/
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//unsigned char receive_hdcp[MAX_KSV_LIST_SIZE];
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//int hdcp_array_len = MAX_KSV_LIST_SIZE;
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@@ -48,18 +40,8 @@ bool new_edid;
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//module_param_array(receive_hdcp, byte, &hdcp_array_len, 0664);
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int hdcp_len;
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int hdcp_repeat_depth;
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bool new_hdcp;
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bool start_auth_14;
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MODULE_PARM_DESC(start_auth_14, "\n start_auth_14\n");
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module_param(start_auth_14, bool, 0664);
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bool repeat_plug;
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MODULE_PARM_DESC(repeat_plug, "\n repeat_plug\n");
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module_param(repeat_plug, bool, 0664);
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int up_phy_addr;/*d c b a 4bit*/
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MODULE_PARM_DESC(up_phy_addr, "\n up_phy_addr\n");
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module_param(up_phy_addr, int, 0664);
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int hdcp22_firm_switch_timeout;
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u8 ksvlist[10] = {
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@@ -75,11 +57,10 @@ u8 ksvlist[10] = {
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void rx_start_repeater_auth(void)
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{
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rx[rx_info.main_port].hdcp.state = REPEATER_STATE_START;
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start_auth_14 = 1;
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rx[rx_info.main_port].hdcp.delay = 0;
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hdcp_len = 0;
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hdcp_repeat_depth = 0;
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rx[rx_info.main_port].hdcp.state = REPEATER_STATE_START;
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rx[rx_info.main_port].hdcp.delay = 0;
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rx[rx_info.main_port].hdcp.dev_exceed = 0;
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rx[rx_info.main_port].hdcp.cascade_exceed = 0;
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rx[rx_info.main_port].hdcp.depth = 0;
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@@ -294,11 +275,6 @@ void rx_check_repeat(u8 port)
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}
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}
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unsigned char *rx_get_dw_edid_addr(void)
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{
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return receive_edid;
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}
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bool get_rx_active_sts(void)
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{
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return rx_info.main_port_open;
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@@ -308,7 +284,6 @@ EXPORT_SYMBOL(get_rx_active_sts);
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void rx_set_repeater_support(bool enable)
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{
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downstream_repeat_support = enable;
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repeat_plug = enable;
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rx_pr("****************=%d\n", downstream_repeat_support);
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}
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EXPORT_SYMBOL(rx_set_repeater_support);
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@@ -6,8 +6,6 @@
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#ifndef __HDMIRX_REPEATER__
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#define __HDMIRX_REPEATER__
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/* EDID */
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#define MAX_RECEIVE_EDID 40/*33*/
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#define MAX_HDR_LUMI 3
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#define MAX_KSV_SIZE 5
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#define MAX_REPEAT_DEPTH 7
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@@ -62,14 +60,12 @@ struct hdcp_hw_info_s {
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unsigned int reserved:15;
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};
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extern int receive_edid_len;
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extern int tx_hpd_event;
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extern bool new_edid;
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//extern int hdcp_array_len;
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extern int hdcp_len;
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extern int hdcp_repeat_depth;
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extern bool new_hdcp;
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extern bool repeat_plug;
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extern int up_phy_addr;/*d c b a 4bit*/
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//extern unsigned char receive_hdcp[MAX_KSV_LIST_SIZE];
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extern u8 ksvlist[10];
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@@ -122,6 +122,17 @@ int hpd_wait_dbg;
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int dump_aud_max = 1;
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int frl_extra_stable_cnt[7] = {0, 20, 20, 20, 20, 60, 60};
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int color_depth_t[3] = {8, 10, 12};
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int hdcp22_auth_sts = 0xff;
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int hdcp14_on;
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bool esm_auth_fail_en;
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bool hdcp22_esm_reset2;
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bool hdcp22_stop_auth;
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/*the esm reset flag for hdcp_rx22*/
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bool esm_reset_flag;
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/* to inform ESM whether the cable is connected or not */
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bool video_stable_to_esm;
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//static int auds_rcv_sts;
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//module_param(auds_rcv_sts, int, 0664);
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//MODULE_PARM_DESC(auds_rcv_sts, "auds_rcv_sts");
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@@ -135,53 +146,17 @@ bool hdcp22_kill_esm;
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MODULE_PARM_DESC(hdcp22_kill_esm, "\n hdcp22_kill_esm\n");
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module_param(hdcp22_kill_esm, bool, 0664);
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bool hdcp_mode_sel;
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MODULE_PARM_DESC(hdcp_mode_sel, "\n hdcp_mode_sel\n");
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module_param(hdcp_mode_sel, bool, 0664);
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bool esm_auth_fail_en;
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MODULE_PARM_DESC(esm_auth_fail_en, "\n esm_auth_fail_en\n");
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module_param(esm_auth_fail_en, bool, 0664);
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/* to inform hdcp_rx22 whether there's any device connected */
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u32 pwr_sts_to_esm;
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static int hdcp22_capable_sts = 0xff;
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bool esm_error_flag;
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/*the esm reset flag for hdcp_rx22*/
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bool esm_reset_flag;
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MODULE_PARM_DESC(esm_reset_flag, "\n esm_reset_flag\n");
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module_param(esm_reset_flag, bool, 0664);
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/* to inform ESM whether the cable is connected or not */
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bool video_stable_to_esm;
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MODULE_PARM_DESC(video_stable_to_esm, "\n video_stable_to_esm\n");
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module_param(video_stable_to_esm, bool, 0664);
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bool enable_hdcp22_esm_log;
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MODULE_PARM_DESC(enable_hdcp22_esm_log, "\n enable_hdcp22_esm_log\n");
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module_param(enable_hdcp22_esm_log, bool, 0664);
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int hdcp22_auth_sts = 0xff;
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MODULE_PARM_DESC(hdcp22_auth_sts, "\n hdcp22_auth_sts\n");
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module_param(hdcp22_auth_sts, int, 0664);
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bool hdcp22_esm_reset2;
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MODULE_PARM_DESC(hdcp22_esm_reset2, "\n hdcp22_esm_reset2\n");
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module_param(hdcp22_esm_reset2, bool, 0664);
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bool hdcp22_stop_auth;
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module_param(hdcp22_stop_auth, bool, 0664);
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MODULE_PARM_DESC(hdcp22_stop_auth, "hdcp22_stop_auth");
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int hdcp14_on;
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MODULE_PARM_DESC(hdcp14_on, "\n hdcp14_on\n");
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module_param(hdcp14_on, int, 0664);
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/*esm recovery mode for changing resolution & hdmi2.0*/
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int esm_recovery_mode = ESM_REC_MODE_TMDS;
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module_param(esm_recovery_mode, int, 0664);
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MODULE_PARM_DESC(esm_recovery_mode, "esm_recovery_mode");
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/* No need to judge frame rate while checking timing stable,as there are
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* some out-spec sources whose framerate change a lot(e.g:59.7~60.16hz).
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@@ -3094,9 +3069,6 @@ void rx_get_global_variable(const char *buf)
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pr_var(vrr_func_en, i++);
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pr_var(allm_func_en, i++);
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pr_var(qms_func_en, i++);
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#ifdef CONFIG_AMLOGIC_HDMITX
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pr_var(receive_edid_len, i++);
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#endif
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pr_var(edid_auto_sel, i++);
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//pr_var(hdcp_array_len, i++);
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#ifdef CONFIG_AMLOGIC_HDMITX
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@@ -3114,6 +3086,9 @@ void rx_get_global_variable(const char *buf)
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pr_var(en_4k_timing, i++);
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pr_var(acr_mode, i++);
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pr_var(force_clk_rate, i++);
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pr_var(bist_delay, i++);
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pr_var(hdcp22_auth_sts, i++);
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pr_var(hdcp14_on, i++);
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pr_var(rx_afifo_dbg_en, i++);
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pr_var(auto_aclk_mute, i++);
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pr_var(aud_avmute_en, i++);
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@@ -3125,7 +3100,6 @@ void rx_get_global_variable(const char *buf)
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pr_var(packet_fifo_cfg, i++);
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pr_var(pd_fifo_start_cnt, i++);
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pr_var(hdcp22_on, i++);
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pr_var(delay_ms_cnt, i++);
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pr_var(eq_max_setting, i++);
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pr_var(eq_dbg_ch0, i++);
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pr_var(eq_dbg_ch1, i++);
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@@ -3416,10 +3390,6 @@ int rx_set_global_variable(const char *buf, int size)
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return pr_var(allm_func_en, index);
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if (set_pr_var(tmpbuf, var_to_str(qms_func_en), &qms_func_en, value))
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return pr_var(qms_func_en, index);
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#ifdef CONFIG_AMLOGIC_HDMITX
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if (set_pr_var(tmpbuf, var_to_str(receive_edid_len), &receive_edid_len, value))
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return pr_var(receive_edid_len, index);
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#endif
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if (set_pr_var(tmpbuf, var_to_str(edid_auto_sel), &edid_auto_sel, value))
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return pr_var(edid_auto_sel, index);
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#ifdef CONFIG_AMLOGIC_HDMITX
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@@ -3452,6 +3422,12 @@ int rx_set_global_variable(const char *buf, int size)
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return pr_var(acr_mode, index);
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if (set_pr_var(tmpbuf, var_to_str(force_clk_rate), &force_clk_rate, value))
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return pr_var(force_clk_rate, index);
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if (set_pr_var(tmpbuf, var_to_str(bist_delay), &bist_delay, value))
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return pr_var(bist_delay, index);
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if (set_pr_var(tmpbuf, var_to_str(hdcp22_auth_sts), &hdcp22_auth_sts, value))
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return pr_var(hdcp22_auth_sts, index);
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if (set_pr_var(tmpbuf, var_to_str(hdcp14_on), &hdcp14_on, value))
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return pr_var(hdcp14_on, index);
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if (set_pr_var(tmpbuf, var_to_str(rx_afifo_dbg_en),
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&rx_afifo_dbg_en, value))
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return pr_var(rx_afifo_dbg_en, index);
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@@ -3475,10 +3451,6 @@ int rx_set_global_variable(const char *buf, int size)
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return pr_var(packet_fifo_cfg, index);
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if (set_pr_var(tmpbuf, var_to_str(pd_fifo_start_cnt), &pd_fifo_start_cnt, value))
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return pr_var(pd_fifo_start_cnt, index);
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if (set_pr_var(tmpbuf, var_to_str(hdcp22_on), &hdcp22_on, value))
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return pr_var(hdcp22_on, index);
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if (set_pr_var(tmpbuf, var_to_str(delay_ms_cnt), &delay_ms_cnt, value))
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return pr_var(delay_ms_cnt, index);
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if (set_pr_var(tmpbuf, var_to_str(eq_max_setting), &eq_max_setting, value))
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return pr_var(eq_max_setting, index);
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if (set_pr_var(tmpbuf, var_to_str(eq_dbg_ch0), &eq_dbg_ch0, value))
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@@ -77,9 +77,7 @@ static struct meson_tvafe_data *s_tvafe_data;
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static struct tvafe_clkgate_type tvafe_clkgate;
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static struct tvafe_dev_s *tvafe_dev_local;
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static bool enable_db_reg = true;
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module_param(enable_db_reg, bool, 0644);
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MODULE_PARM_DESC(enable_db_reg, "enable/disable tvafe load reg");
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bool enable_db_reg = true;
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/*tvconfig snow config*/
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static bool snow_cfg;
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@@ -101,6 +101,7 @@ extern bool tvafe_signal_stable;
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extern bool tvafe_mode;
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extern bool demod_is_pal;
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extern struct tvafe_avin_det_s *av_dev;
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extern bool enable_db_reg;
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extern enum tvafe_no_std_config_e force_nostd;
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@@ -150,8 +150,6 @@ static unsigned int acd_h = 0x890359;
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static unsigned int acd_h_back = 0x890359;
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unsigned int acd_ntscm_h_back = 0x00880358;
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module_param(acd_ntscm_h_back, uint, 0644);
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MODULE_PARM_DESC(acd_ntscm_h_back, "acd_ntscm_h_back");
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static unsigned int dec_stop_not_adj = 1;
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@@ -211,8 +209,6 @@ unsigned long vbi_mem_start;
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bool agc_gain_sts = true;
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static int acd_2d_adjust = 0x94;
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module_param(acd_2d_adjust, int, 0644);
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MODULE_PARM_DESC(acd_2d_adjust, "enable/disable acd_2d_adjust");
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void cvd_set_shift_cnt(enum tvafe_cvd2_shift_cnt_e src, unsigned int val)
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{
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@@ -611,6 +611,11 @@ static ssize_t debug_store(struct device *dev,
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tvafe_reset_module();
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else if (parm[0][5] == '1')
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tvafe_cvd2_hold_rst();
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} else if (!strncmp(parm[0], "enable_db_reg", strlen("enable_db_reg"))) {
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if (parm[0][13] == '1')
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enable_db_reg = 1;
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else
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enable_db_reg = 0;
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} else {
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tvafe_pr_info("[%s]:invalid command.\n", __func__);
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}
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