shinys000114/kernel_common_drivers
1
0
Fork 0
mirror of https://github.com/hardkernel/kernel_common_drivers.git synced 2026-06-25 12:03:48 +09:00
Code Issues Packages Projects Releases Wiki Activity

dvfs: s7: fix dsuclk when cpuclk to 1.512G and 1.2G [1/1]

Browse Source 
PD#SWPL-163704

Problem:
dsuclk is 1.344G when cpuclk is 1.512G;
cpuclk is 1.2G, dsuclk need config to 1G;

Solution:
fix cpuclk = 1.5G, dsuclk = 1.2G;
fix cpuclk = 1.2G, dsuclk = 1G;

Verify:
s7_bh201

Change-Id: I54e21863dc06e544261cb792af45d52d06e68cea
Signed-off-by: yiting.deng <yiting.deng@amlogic.com>
This commit is contained in:
yiting.deng
2024-04-03 14:30:25 +08:00
committed by Luan Yuan
parent 5d2466198e
commit 89faaa842f
2 changed files with 24 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/boot/dts/amlogic/mesons7_cpufreq.dtsi
+12 -8
View File
@@ -353,14 +353,18 @@
//skip_volt_scaling;
cluster_cores = <0 1 2 3>;
//pdvfs_enabled;
dsu-opp-table0 = <1000000 1200000 879000>,
<1500000 1344000 929000>;
dsu-opp-table1 = <1000000 1200000 879000>,
<1500000 1344000 929000>;
dsu-opp-table2 = <1000000 1200000 879000>,
<1500000 1344000 929000>;
dsu-opp-table3 = <1000000 1200000 879000>,
<1500000 1344000 929000>;
dsu-opp-table0 = <1000000 1000000 869000>,
<1200000 1200000 879000>,
<1512000 1344000 929000>;
dsu-opp-table1 = <1000000 1000000 869000>,
<1200000 1200000 879000>,
<1512000 1344000 929000>;
dsu-opp-table2 = <1000000 1000000 869000>,
<1200000 1200000 879000>,
<1512000 1344000 929000>;
dsu-opp-table3 = <1000000 1000000 869000>,
<1200000 1200000 879000>,
<1512000 1344000 929000>;
};
};
};/* end of / */
arch/arm64/boot/dts/amlogic/mesons7_cpufreq.dtsi
+12 -8
View File
@@ -353,14 +353,18 @@
//skip_volt_scaling;
cluster_cores = <0 1 2 3>;
//pdvfs_enabled;
dsu-opp-table0 = <1000000 1200000 879000>,
<1500000 1344000 929000>;
dsu-opp-table1 = <1000000 1200000 879000>,
<1500000 1344000 929000>;
dsu-opp-table2 = <1000000 1200000 879000>,
<1500000 1344000 929000>;
dsu-opp-table3 = <1000000 1200000 879000>,
<1500000 1344000 929000>;
dsu-opp-table0 = <1000000 1000000 869000>,
<1200000 1200000 879000>,
<1512000 1344000 929000>;
dsu-opp-table1 = <1000000 1000000 869000>,
<1200000 1200000 879000>,
<1512000 1344000 929000>;
dsu-opp-table2 = <1000000 1000000 869000>,
<1200000 1200000 879000>,
<1512000 1344000 929000>;
dsu-opp-table3 = <1000000 1000000 869000>,
<1200000 1200000 879000>,
<1512000 1344000 929000>;
};
};
};/* end of / */