saradc/keypad: support saradc/keypad [1/1]

PD#SWPL-125780

Problem:
TXHD2 Silicon Bringup

Solution:
TXHD2 Silicon Bringup

Verify:
TXHD2/BE319

Change-Id: I87e6c10beb5c464090ab94c1814d8fff459badb3
Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>

arch/arm/boot/dts/amlogic/mesontxhd2.dtsi

@@ -1403,6 +1403,19 @@
 	chosen {
 		bootargs = "usbcore.autosuspend=-1";
 	};
+
+	saradc: saradc {
+		compatible = "amlogic,meson-txhd2-saradc";
+		status = "disabled";
+		#io-channel-cells = <1>;
+		clocks = <&xtal>,
+			 <&clkc_AO CLKID_AO_SAR_ADC>,
+			 <&clkc_AO CLKID_SARADC_GATE>,
+			 <&clkc_AO CLKID_SARADC_MUX>;
+		clock-names = "clkin", "core", "adc_clk", "adc_sel";
+		interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
+		reg = <0xff809000 0x48>;
+	};
 };
 
 &pinctrl_aobus {

arch/arm/boot/dts/amlogic/txhd2_t950s_be301.dts

@@ -487,6 +487,23 @@
 		amlvideo2_id = <1>;
 		cma_mode = <1>;
 	};
+
+	/* for external keypad */
+	adc_keypad {
+		compatible = "amlogic, adc_keypad";
+		status = "okay";
+		key_name = "power", "vol-", "vol+", "ok", "menu", "source", "exit";
+		key_num = <7>;
+		io-channels = <&saradc SARADC_CH2>, <&saradc SARADC_CH3>;
+		io-channel-names = "key-chan-2", "key-chan-3";
+		key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+			    SARADC_CH3 SARADC_CH3>;
+		key_code = <KEY_POWER KEY_VOLUMEDOWN KEY_VOLUMEUP KEY_ENTER KEY_MENU
+			    KEY_FN_F1 KEY_EXIT>;
+		/* key_val = voltage / 1800mV * 1023 */
+		key_val = <0 143 266 389 507 143 266>;
+		key_tolerance = <40 40 40 40 40 40 40>;
+	};
 }; /* end of / */
 
 &tdmb {
@@ -648,6 +665,10 @@
 	phy-mode = "rmii";
 };
 
+&saradc {
+	status = "okay";
+};
+
 &amlvecm {
 	status = "okay";
 	gamma_en = <1>;/*1:enable ;0:disable*/

arch/arm/boot/dts/amlogic/txhd2_t950s_be309.dts

@@ -489,6 +489,20 @@
 		cma_mode = <1>;
 	};
 
+	/* for external keypad */
+	adc_keypad {
+		compatible = "amlogic, adc_keypad";
+		status = "okay";
+		key_name = "power", "vol-", "vol+", "ok";
+		key_num = <4>;
+		io-channels = <&saradc SARADC_CH2>;
+		io-channel-names = "key-chan-2";
+		key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2>;
+		key_code = <KEY_POWER KEY_VOLUMEDOWN KEY_VOLUMEUP KEY_ENTER>;
+		/* key_val = voltage / 1800mV * 1023 */
+		key_val = <0 143 266 389>;
+		key_tolerance = <40 40 40 40>;
+	};
 }; /* end of / */
 
 &spdifa {
@@ -635,6 +649,10 @@
 	phy-mode = "rmii";
 };
 
+&saradc {
+	status = "okay";
+};
+
 &amlvecm {
 	status = "okay";
 	gamma_en = <1>;/*1:enable ;0:disable*/

arch/arm/boot/dts/amlogic/txhd2_t950s_be311.dts

@@ -489,6 +489,23 @@
 		amlvideo2_id = <1>;
 		cma_mode = <1>;
 	};
+
+	/* for external keypad */
+	adc_keypad {
+		compatible = "amlogic, adc_keypad";
+		status = "okay";
+		key_name = "power", "vol-", "vol+", "ok", "menu", "source", "exit";
+		key_num = <7>;
+		io-channels = <&saradc SARADC_CH2>, <&saradc SARADC_CH3>;
+		io-channel-names = "key-chan-2", "key-chan-3";
+		key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+			    SARADC_CH3 SARADC_CH3>;
+		key_code = <KEY_POWER KEY_VOLUMEDOWN KEY_VOLUMEUP KEY_ENTER KEY_MENU
+			    KEY_FN_F1 KEY_EXIT>;
+		/* key_val = voltage / 1800mV * 1023 */
+		key_val = <0 143 266 389 507 143 266>;
+		key_tolerance = <40 40 40 40 40 40 40>;
+	};
 }; /* end of / */
 
 &tdmb {
@@ -649,6 +666,10 @@
 	phy-mode = "rmii";
 };
 
+&saradc {
+	status = "okay";
+};
+
 &amlvecm {
 	status = "okay";
 	gamma_en = <1>;/*1:enable ;0:disable*/

arch/arm/boot/dts/amlogic/txhd2_t950s_be311_512m.dts

@@ -307,6 +307,23 @@
 		amlvideo2_id = <1>;
 		cma_mode = <1>;
 	};
+
+	/* for external keypad */
+	adc_keypad {
+		compatible = "amlogic, adc_keypad";
+		status = "okay";
+		key_name = "power", "vol-", "vol+", "ok", "menu", "source", "exit";
+		key_num = <7>;
+		io-channels = <&saradc SARADC_CH2>, <&saradc SARADC_CH3>;
+		io-channel-names = "key-chan-2", "key-chan-3";
+		key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+			    SARADC_CH3 SARADC_CH3>;
+		key_code = <KEY_POWER KEY_VOLUMEDOWN KEY_VOLUMEUP KEY_ENTER KEY_MENU
+			    KEY_FN_F1 KEY_EXIT>;
+		/* key_val = voltage / 1800mV * 1023 */
+		key_val = <0 143 266 389 507 143 266>;
+		key_tolerance = <40 40 40 40 40 40 40>;
+	};
 }; /* end of / */
 
 &sd_emmc_c {
@@ -384,6 +401,10 @@
 	status = "okay";
 };
 
+&saradc {
+	status = "okay";
+};
+
 &amlvecm {
 	status = "okay";
 	gamma_en = <1>;/*1:enable ;0:disable*/

arch/arm/boot/dts/amlogic/txhd2_t950s_be319.dts

@@ -491,6 +491,21 @@
 		amlvideo2_id = <1>;
 		cma_mode = <1>;
 	};
+
+	/* for external keypad */
+	adc_keypad {
+		compatible = "amlogic, adc_keypad";
+		status = "okay";
+		key_name = "power", "vol-", "vol+", "ok";
+		key_num = <4>;
+		io-channels = <&saradc SARADC_CH2>;
+		io-channel-names = "key-chan-2";
+		key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2>;
+		key_code = <KEY_POWER KEY_VOLUMEDOWN KEY_VOLUMEUP KEY_ENTER>;
+		/* key_val = voltage / 1800mV * 1023 */
+		key_val = <0 143 266 389>;
+		key_tolerance = <40 40 40 40>;
+	};
 }; /* end of / */
 
 &spdifa {
@@ -636,6 +651,10 @@
 	phy-mode = "rmii";
 };
 
+&saradc {
+	status = "okay";
+};
+
 &amlvecm {
 	status = "okay";
 	gamma_en = <1>;/*1:enable ;0:disable*/

arch/arm/boot/dts/amlogic/txhd2_t950s_be319_512m.dts

@@ -308,6 +308,21 @@
 		amlvideo2_id = <1>;
 		cma_mode = <1>;
 	};
+
+	/* for external keypad */
+	adc_keypad {
+		compatible = "amlogic, adc_keypad";
+		status = "okay";
+		key_name = "power", "vol-", "vol+", "ok";
+		key_num = <4>;
+		io-channels = <&saradc SARADC_CH2>;
+		io-channel-names = "key-chan-2";
+		key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2>;
+		key_code = <KEY_POWER KEY_VOLUMEDOWN KEY_VOLUMEUP KEY_ENTER>;
+		/* key_val = voltage / 1800mV * 1023 */
+		key_val = <0 143 266 389>;
+		key_tolerance = <40 40 40 40>;
+	};
 }; /* end of / */
 
 &sd_emmc_c {
@@ -385,6 +400,10 @@
 	status = "okay";
 };
 
+&saradc {
+	status = "okay";
+};
+
 &amlvecm {
 	status = "okay";
 	gamma_en = <1>;/*1:enable ;0:disable*/

drivers/iio/adc/meson_saradc.c

@@ -1321,6 +1321,11 @@ static const struct meson_sar_adc_data meson_sar_adc_c2_data = {
 	.name = "meson-c2-saradc",
 };
 
+static const struct meson_sar_adc_data meson_sar_adc_txhd2_data = {
+	.param = &meson_sar_adc_txhd2_param,
+	.name = "meson-txhd2-saradc",
+};
+
 static const struct of_device_id meson_sar_adc_of_match[] = {
 #ifndef CONFIG_AMLOGIC_REMOVE_OLD
 	{
@@ -1361,6 +1366,10 @@ static const struct of_device_id meson_sar_adc_of_match[] = {
 		.compatible = "amlogic,meson-c2-saradc",
 		.data = &meson_sar_adc_c2_data,
 	},
+	{
+		.compatible = "amlogic,meson-txhd2-saradc",
+		.data = &meson_sar_adc_txhd2_data,
+	},
 	{},
 };
 MODULE_DEVICE_TABLE(of, meson_sar_adc_of_match);

drivers/iio/adc/meson_saradc.h

@@ -81,6 +81,7 @@ struct meson_sar_adc_param {
 	u8					has_bl30_integration;
 	unsigned long				clock_rate;
 	u32                                     bandgap_reg;
+	u32					bandgap_en_mask;
 	unsigned int				resolution;
 	const struct regmap_config		*regmap_config;
 	u8					temperature_trimming_bits;
@@ -131,3 +132,4 @@ extern const struct meson_sar_adc_param meson_sar_adc_gxl_param __initconst;
 extern const struct meson_sar_adc_param meson_sar_adc_txlx_param __initconst;
 extern const struct meson_sar_adc_param meson_sar_adc_g12a_param __initconst;
 extern const struct meson_sar_adc_param meson_sar_adc_c2_param __initconst;
+extern const struct meson_sar_adc_param meson_sar_adc_txhd2_param __initconst;

drivers/iio/adc/meson_saradc_m8.c

@@ -19,7 +19,6 @@
 	#define MESON_SAR_ADC_DELTA_10_CHAN1_DELTA_VALUE_MASK	GENMASK(25, 16)
 	#define MESON_SAR_ADC_DELTA_10_TS_REVE0			BIT(15)
 	#define MESON_SAR_ADC_DELTA_10_TS_C_MASK		GENMASK(14, 11)
-	#define MESON_SAR_ADC_DELTA_10_TS_VBG_EN		BIT(10)
 	#define MESON_SAR_ADC_DELTA_10_CHAN0_DELTA_VALUE_MASK	GENMASK(9, 0)
 /*
  * NOTE: registers from here are undocumented (the vendor Linux kernel driver
@@ -34,7 +33,6 @@
 	#define MESON_SAR_ADC_REG11_TEMP_SEL			BIT(21)
 	#define MESON_SAR_ADC_REG11_CHNL_REGS_EN		BIT(30)
 	#define MESON_SAR_ADC_REG11_FIFO_EN			BIT(31)
-	#define MESON_SAR_ADC_REG11_BANDGAP_EN			BIT(13)
 
 #define MESON_SAR_ADC_REG13					0x34
 	#define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK	GENMASK(13, 8)
@@ -263,16 +261,11 @@ static int meson_m8_sar_adc_read_chnl(struct iio_dev *indio_dev,
 
 static void meson_m8_sar_adc_set_bandgap(struct iio_dev *indio_dev, bool on_off)
 {
-	u32 enable_mask;
 	struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
 
-	if (priv->param->bandgap_reg == MESON_SAR_ADC_REG11)
-		enable_mask = MESON_SAR_ADC_REG11_BANDGAP_EN;
-	else
-		enable_mask = MESON_SAR_ADC_DELTA_10_TS_VBG_EN;
-
-	regmap_update_bits(priv->regmap, priv->param->bandgap_reg, enable_mask,
-			   on_off ? enable_mask : 0);
+	regmap_update_bits(priv->regmap, priv->param->bandgap_reg,
+			   priv->param->bandgap_en_mask,
+			   on_off ? priv->param->bandgap_en_mask : 0);
 }
 
 static void meson_m8_sar_adc_select_temp(struct iio_dev *indio_dev,
@@ -345,6 +338,7 @@ const struct meson_sar_adc_param meson_sar_adc_meson8b_param __initconst = {
 	.has_bl30_integration = false,
 	.clock_rate = 1150000,
 	.bandgap_reg = MESON_SAR_ADC_DELTA_10,
+	.bandgap_en_mask = BIT(10),
 	.regmap_config = &meson_sar_adc_regmap_config_meson8,
 	.resolution = 10,
 	.calib_enable = true,
@@ -357,6 +351,7 @@ const struct meson_sar_adc_param meson_sar_adc_gxbb_param __initconst = {
 	.has_bl30_integration = true,
 	.clock_rate = 1200000,
 	.bandgap_reg = MESON_SAR_ADC_REG11,
+	.bandgap_en_mask = BIT(13),
 	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
 	.resolution = 10,
 	.vrefp_select = 1,
@@ -371,6 +366,7 @@ const struct meson_sar_adc_param meson_sar_adc_gxl_param __initconst = {
 	.has_bl30_integration = true,
 	.clock_rate = 1200000,
 	.bandgap_reg = MESON_SAR_ADC_REG11,
+	.bandgap_en_mask = BIT(13),
 	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
 	.resolution = 12,
 	.disable_ring_counter = 1,
@@ -386,6 +382,7 @@ const struct meson_sar_adc_param meson_sar_adc_txlx_param __initconst = {
 	.has_bl30_integration = true,
 	.clock_rate = 1200000,
 	.bandgap_reg = MESON_SAR_ADC_REG11,
+	.bandgap_en_mask = BIT(13),
 	.regmap_config = &meson_sar_adc_regmap_config_gxbb,
 	.resolution = 12,
 	.vref_is_optional = true,
@@ -402,6 +399,7 @@ const struct meson_sar_adc_param meson_sar_adc_g12a_param __initconst = {
 	.has_bl30_integration = false,
 	.clock_rate = 1200000,
 	.bandgap_reg = MESON_SAR_ADC_REG11,
+	.bandgap_en_mask = BIT(13),
 	.regmap_config = &meson_sar_adc_regmap_config_g12a,
 	.resolution = 12,
 	.vref_is_optional = true,
@@ -414,3 +412,21 @@ const struct meson_sar_adc_param meson_sar_adc_g12a_param __initconst = {
 	.channels = meson_m8_sar_adc_iio_channels,
 	.num_channels = ARRAY_SIZE(meson_m8_sar_adc_iio_channels),
 };
+
+const struct meson_sar_adc_param meson_sar_adc_txhd2_param __initconst = {
+	.has_bl30_integration = false,
+	.clock_rate = 1200000,
+	.bandgap_reg = MESON_SAR_ADC_REG11,
+	.bandgap_en_mask = BIT(12),
+	.regmap_config = &meson_sar_adc_regmap_config_g12a,
+	.resolution = 12,
+	.vref_is_optional = true,
+	.disable_ring_counter = 1,
+	.has_chnl_regs = true,
+	.vrefp_select = 1,
+	.cmv_select = 1,
+	.adc_eoc = 1,
+	.dops = &meson_m8_diff_ops,
+	.channels = meson_m8_sar_adc_iio_channels,
+	.num_channels = ARRAY_SIZE(meson_m8_sar_adc_iio_channels),
+};