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video: aisr cause video flash [1/1]

Browse Source 
PD#SWPL-114374

Problem:
aisr cause video flash

Solution:
set function in primary_render_frame

Verify:
s5

Change-Id: I776b5f11e59f79d3579b55f2ac4a05e74067c4d2
Signed-off-by: hai.cao <hai.cao@amlogic.com>
This commit is contained in:
hai.cao
2023-04-07 15:07:12 +08:00
committed by gerrit autosubmit
parent bc6f2d190c
commit 998f6b6931
2 changed files with 28 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/media/video_sink/video_hw.c
+13 -10
View File
@@ -12308,24 +12308,26 @@ void aisr_scaler_setting(struct video_layer_s *layer,
void aisr_demo_axis_set(void)
{
u8 vpp_index = VPP0;
static bool en_flag;
static bool en_flag = FALSE;
static u32 original_reg_value1;
static u32 original_reg_value2;
if (cur_dev->aisr_demo_en) {
original_reg_value1 = READ_VCBUS_REG(DEMO_MODE_WINDO_CTRL0);
original_reg_value2 = READ_VCBUS_REG(DEMO_MODE_WINDO_CTRL1);
en_flag = TRUE;
if (!cur_dev->aisr_support)
return;
if (cur_dev->display_module == S5_DISPLAY_MODULE)
return aisr_demo_axis_set_s5();
if (!en_flag) {
original_reg_value1 = READ_VCBUS_REG(DEMO_MODE_WINDO_CTRL0);
original_reg_value2 = READ_VCBUS_REG(DEMO_MODE_WINDO_CTRL1);
en_flag = TRUE;
}
cur_dev->rdma_func[vpp_index].rdma_wr_bits
(DEMO_MODE_WINDO_CTRL0,
cur_dev->aisr_demo_en, 29, 1);
cur_dev->rdma_func[vpp_index].rdma_wr_bits
(DEMO_MODE_WINDO_CTRL0,
1, 12, 4);
if (cur_dev->display_module == S5_DISPLAY_MODULE)
return aisr_demo_axis_set_s5();
if (!cur_dev->aisr_support)
return;
cur_dev->rdma_func[vpp_index].rdma_wr_bits
(DEMO_MODE_WINDO_CTRL0,
cur_dev->aisr_demo_xstart, 16, 12);
@@ -12339,15 +12341,16 @@ void aisr_demo_axis_set(void)
(DEMO_MODE_WINDO_CTRL1,
cur_dev->aisr_demo_yend, 0, 12);
} else {
if (cur_dev->display_module == S5_DISPLAY_MODULE)
return aisr_demo_axis_set_s5();
if (!cur_dev->aisr_support)
return;
if (cur_dev->display_module == S5_DISPLAY_MODULE)
return aisr_demo_axis_set_s5();
if (en_flag) {
cur_dev->rdma_func[vpp_index].rdma_wr
(DEMO_MODE_WINDO_CTRL0, original_reg_value1);
cur_dev->rdma_func[vpp_index].rdma_wr
(DEMO_MODE_WINDO_CTRL1, original_reg_value2);
en_flag = FALSE;
}
}
}
drivers/media/video_sink/video_hw_s5.c
+15 -23
View File
@@ -9750,27 +9750,10 @@ void aisr_reshape_output_s5(u32 enable)
}
}
void aisr_demo_enable_s5(void)
{
struct vd_proc_sr_reg_s *vd_sr_reg = NULL;
if (!cur_dev->aisr_support)
return;
vd_sr_reg = &vd_proc_reg.vd_proc_sr_reg;
/* reshape and aisr demo is mutex */
WRITE_VCBUS_REG_BITS
(vd_sr_reg->srsharp1_demo_mode_window_ctrl0,
cur_dev->aisr_demo_en, 29, 1);
WRITE_VCBUS_REG_BITS
(vd_sr_reg->srsharp1_demo_mode_window_ctrl0,
1, 12, 4);
}
void aisr_demo_axis_set_s5(void)
{
u8 vpp_index = VPP0;
static bool en_flag;
static bool en_flag = FALSE;
static u32 original_reg_value1;
static u32 original_reg_value2;
struct vd_proc_sr_reg_s *vd_sr_reg = NULL;
@@ -9780,11 +9763,19 @@ void aisr_demo_axis_set_s5(void)
vd_sr_reg = &vd_proc_reg.vd_proc_sr_reg;
if (cur_dev->aisr_demo_en) {
original_reg_value1 =
READ_VCBUS_REG(vd_sr_reg->srsharp1_demo_mode_window_ctrl0);
original_reg_value2 =
READ_VCBUS_REG(vd_sr_reg->srsharp1_demo_mode_window_ctrl1);
en_flag = TRUE;
if (!en_flag) {
original_reg_value1 =
READ_VCBUS_REG(vd_sr_reg->srsharp1_demo_mode_window_ctrl0);
original_reg_value2 =
READ_VCBUS_REG(vd_sr_reg->srsharp1_demo_mode_window_ctrl1);
en_flag = TRUE;
}
cur_dev->rdma_func[vpp_index].rdma_wr_bits
(vd_sr_reg->srsharp1_demo_mode_window_ctrl0,
cur_dev->aisr_demo_en, 29, 1);
cur_dev->rdma_func[vpp_index].rdma_wr_bits
(vd_sr_reg->srsharp1_demo_mode_window_ctrl0,
1, 12, 4);
cur_dev->rdma_func[vpp_index].rdma_wr_bits
(vd_sr_reg->srsharp1_demo_mode_window_ctrl0,
cur_dev->aisr_demo_xstart, 16, 12);
@@ -9805,6 +9796,7 @@ void aisr_demo_axis_set_s5(void)
cur_dev->rdma_func[vpp_index].rdma_wr
(vd_sr_reg->srsharp1_demo_mode_window_ctrl1,
original_reg_value2);
en_flag = FALSE;
}
}
}