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osd: sync code from 5.15 [1/1]

Browse Source 
PD#SWPL-168197

Problem:
sync code

Solution:
sync code

Verify:
sc2/sm1

Change-Id: I5be458961ddaaf0da28edd9afabadb637b7c1a0d
Signed-off-by: hai.cao <hai.cao@amlogic.com>
This commit is contained in:
hai.cao
2024-05-24 16:03:02 +08:00
committed by Dezhen Wang
parent a36dc56a68
commit 9d65c6500a
8 changed files with 435 additions and 306 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/media/osd/osd.h
+3
View File
@@ -328,6 +328,8 @@ enum cpuid_type_e {
__MESON_CPU_MAJOR_ID_T3X,
__MESON_CPU_MAJOR_ID_TXHD2,
__MESON_CPU_MAJOR_ID_S1A,
__MESON_CPU_MAJOR_ID_S7,
__MESON_CPU_MAJOR_ID_S7D,
__MESON_CPU_MAJOR_ID_UNKNOWN,
};
@@ -920,6 +922,7 @@ struct hw_osd_blending_s {
extern struct hw_osd_reg_s hw_osd_reg_array[HW_OSD_COUNT];
extern struct hw_osd_blend_reg_s hw_osd_reg_blend;
extern struct hw_osd_vout_blend_reg_s hw_osd_vout_blend_reg;
typedef void (*update_func_t)(u32);
struct hw_list_s {
struct list_head list;
drivers/media/osd/osd_backup.c
-1
View File
@@ -64,7 +64,6 @@ u32 mali_afbc2_t7_backup[MALI_AFBC2_VALUE_T7_COUNT];
/* 0: not backup */
static u32 backup_enable;
/* module parameter for debugging */
struct osd_module_debug_s debug_osd_backup[7] = {
{"osd_backup", osd_backup, OSD_VALUE_COUNT, 1},
drivers/media/osd/osd_debug.c
+6 -6
View File
@@ -356,22 +356,22 @@ static void osd_debug_dump_register_all(void)
if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE ||
osd_dev_hw.display_type == C3_DISPLAY) {
reg = osd_reg->osd_blk1_cfg_w4;
osd_log_info("reg[0x%x]: 0x%08x(osd_blk1_cfg_w4)\n",
osd_log_info("reg[0x%x]: 0x%08x\n",
reg, osd_reg_read(reg));
reg = osd_reg->osd_blk2_cfg_w4;
osd_log_info("reg[0x%x]: 0x%08x(osd_blk2_cfg_w4)\n",
osd_log_info("reg[0x%x]: 0x%08x\n",
reg, osd_reg_read(reg));
reg = osd_reg->osd_prot_ctrl;
osd_log_info("reg[0x%x]: 0x%08x(osd_prot_ctrl)\n",
osd_log_info("reg[0x%x]: 0x%08x\n",
reg, osd_reg_read(reg));
reg = osd_reg->osd_mali_unpack_ctrl;
osd_log_info("reg[0x%x]: 0x%08x(osd_mali_unpack_ctrl)\n",
osd_log_info("reg[0x%x]: 0x%08x\n",
reg, osd_reg_read(reg));
reg = osd_reg->osd_dimm_ctrl;
osd_log_info("reg[0x%x]: 0x%08x(osd_dimm_ctrl)\n",
osd_log_info("reg[0x%x]: 0x%08x\n",
reg, osd_reg_read(reg));
reg = osd_reg->osd_matrix_en_ctrl;
osd_log_info("reg[0x%x]: 0x%08x(osd_matrix_en_ctrl)\n",
osd_log_info("reg[0x%x]: 0x%08x\n",
reg, osd_reg_read(reg));
reg = osd_reg->osd_vsc_phase_step;
osd_log_info("reg[0x%x]: 0x%08x\n",
drivers/media/osd/osd_fb.c
+79 -2
View File
@@ -4794,8 +4794,6 @@ static void free_reserved_mem(unsigned long start, unsigned long size)
aml_free_reserved_area(__va(start),
__va(bound << PAGE_SHIFT),
0, "fb-memory");
zone = page_zone(epage);
bound = zone->zone_start_pfn;
free_reserved_highmem(bound << PAGE_SHIFT, end);
}
}
@@ -4861,6 +4859,7 @@ static void mem_free_work(struct work_struct *work)
}
}
#ifndef CONFIG_AMLOGIC_C3_REMOVE
#ifndef CONFIG_AMLOGIC_REMOVE_OLD
static struct osd_device_data_s osd_gxbb = {
.cpu_id = __MESON_CPU_MAJOR_ID_GXBB,
@@ -5255,6 +5254,7 @@ static struct osd_device_hw_s t5w_dev_property = {
.remove_pps = 3,
.prevsync_support = 0,
};
#endif
static struct osd_device_hw_s c3_dev_property = {
.display_type = C3_DISPLAY,
@@ -5269,6 +5269,7 @@ static struct osd_device_hw_s c3_dev_property = {
.prevsync_support = 0,
};
#ifndef CONFIG_AMLOGIC_C3_REMOVE
static struct osd_device_hw_s t5m_dev_property = {
.display_type = T7_DISPLAY,
.has_8G_addr = 1,
@@ -5350,6 +5351,7 @@ static struct osd_device_data_s osd_t5w = {
.has_vpp1 = 1,
.has_vpp2 = 0,
};
#endif
static struct osd_device_data_s osd_c3 = {
.cpu_id = __MESON_CPU_MAJOR_ID_C3,
@@ -5370,6 +5372,7 @@ static struct osd_device_data_s osd_c3 = {
.has_vpp2 = 0,
};
#ifndef CONFIG_AMLOGIC_C3_REMOVE
static struct osd_device_data_s osd_a4 = {
.cpu_id = __MESON_CPU_MAJOR_ID_A4,
.osd_ver = OSD_SIMPLE,
@@ -5479,6 +5482,19 @@ static struct osd_device_hw_s t3x_dev_property = {
.s5_display = 1,
};
static struct osd_device_hw_s s7_dev_property = {
.display_type = NORMAL_DISPLAY,
.has_8G_addr = 1,
.multi_afbc_core = 0,
.share_afbc_core = 0,
.has_multi_vpp = 0,
.new_blend_bypass = 0,
.path_ctrl_independ = 0,
.remove_afbc = 0,
.remove_pps = 0,
.prevsync_support = 0,
};
static struct osd_device_data_s osd_txhd2 = {
.cpu_id = __MESON_CPU_MAJOR_ID_TXHD2,
.osd_ver = OSD_HIGH_ONE,
@@ -5499,7 +5515,44 @@ static struct osd_device_data_s osd_txhd2 = {
.has_vpp2 = 0,
};
static struct osd_device_data_s osd_s7 = {
.cpu_id = __MESON_CPU_MAJOR_ID_S7,
.osd_ver = OSD_HIGH_ONE,
.afbc_type = MALI_AFBC,
.osd_count = 2,
.has_deband = 1,
.has_lut = 1,
.has_rdma = 1,
.has_dolby_vision = 0,
.osd_fifo_len = 64, /* fifo len 64*8 = 512 */
.vpp_fifo_len = 0xfff,/* 2048 */
.dummy_data = 0x00808000,
.has_viu2 = 0,
.osd0_sc_independ = 0,
.mif_linear = 1,
};
static struct osd_device_data_s osd_s7d = {
.cpu_id = __MESON_CPU_MAJOR_ID_S7D,
.osd_ver = OSD_HIGH_ONE,
.afbc_type = MALI_AFBC,
.osd_count = 2,
.has_deband = 1,
.has_lut = 1,
.has_rdma = 1,
.has_dolby_vision = 1,
.osd_fifo_len = 64, /* fifo len 64*8 = 512 */
.vpp_fifo_len = 0xfff,/* 2048 */
.dummy_data = 0x00808000,
.has_viu2 = 0,
.osd0_sc_independ = 0,
.mif_linear = 1,
};
#endif
static const struct of_device_id meson_fb_dt_match[] = {
#ifndef CONFIG_AMLOGIC_C3_REMOVE
#ifndef CONFIG_AMLOGIC_REMOVE_OLD
{
.compatible = "amlogic, fb-gxbb",
@@ -5591,10 +5644,12 @@ static const struct of_device_id meson_fb_dt_match[] = {
.compatible = "amlogic, fb-t5w",
.data = &osd_t5w,
},
#endif
{
.compatible = "amlogic, fb-c3",
.data = &osd_c3,
},
#ifndef CONFIG_AMLOGIC_C3_REMOVE
{
.compatible = "amlogic, fb-a4",
.data = &osd_a4,
@@ -5615,6 +5670,15 @@ static const struct of_device_id meson_fb_dt_match[] = {
.compatible = "amlogic, fb-txhd2",
.data = &osd_txhd2,
},
{
.compatible = "amlogic, fb-s7",
.data = &osd_s7,
},
{
.compatible = "amlogic, fb-s7d",
.data = &osd_s7d,
},
#endif
{},
};
@@ -5727,6 +5791,7 @@ static int __init osd_probe(struct platform_device *pdev)
amlfb_virtual_probe(pdev);
return 0;
}
#ifndef CONFIG_AMLOGIC_C3_REMOVE
if (osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_T7)
memcpy(&osd_dev_hw, &t7_dev_property,
sizeof(struct osd_device_hw_s));
@@ -5738,8 +5803,13 @@ static int __init osd_probe(struct platform_device *pdev)
sizeof(struct osd_device_hw_s));
else if (osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_C3 ||
osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_A4)
#else
if (osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_C3 ||
osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_A4)
#endif
memcpy(&osd_dev_hw, &c3_dev_property,
sizeof(struct osd_device_hw_s));
#ifndef CONFIG_AMLOGIC_C3_REMOVE
else if (osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_T5M)
memcpy(&osd_dev_hw, &t5m_dev_property,
sizeof(struct osd_device_hw_s));
@@ -5749,9 +5819,16 @@ static int __init osd_probe(struct platform_device *pdev)
else if (osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_T3X)
memcpy(&osd_dev_hw, &t3x_dev_property,
sizeof(struct osd_device_hw_s));
else if (osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_S7)
memcpy(&osd_dev_hw, &s7_dev_property,
sizeof(struct osd_device_hw_s));
else if (osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_S7D)
memcpy(&osd_dev_hw, &s7_dev_property,
sizeof(struct osd_device_hw_s));
else
memcpy(&osd_dev_hw, &legcy_dev_property,
sizeof(struct osd_device_hw_s));
#endif
prop = of_get_property(pdev->dev.of_node, "display_device_cnt", NULL);
if (prop)
drivers/media/osd/osd_fb.h
-1
View File
@@ -76,7 +76,6 @@ extern unsigned int osd_game_mode[];
extern unsigned int osd_pi_debug, osd_pi_enable;
extern unsigned int osd_slice2ppc_debug, osd_slice2ppc_enable;
extern struct mutex preblend_lock;
extern struct osd_module_debug_s debug_osd_backup[7];
extern struct osd_module_debug_s debug_osd_rdma[14];
extern struct osd_module_debug_s debug_osd_hw[15];
drivers/media/osd/osd_hw.c
+334 -286
View File
@@ -41,6 +41,7 @@
#endif
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM
#include <linux/amlogic/media/amvecm/ve.h>
#include <linux/amlogic/media/amvecm/amvecm.h>
#endif
#ifdef CONFIG_AMLOGIC_MEDIA_VIDEO
@@ -131,6 +132,7 @@ struct hw_osd_slice2ppc_s osd_slice2ppc;
struct hw_osd_vout_blend_reg_s hw_osd_vout_blend_reg;
struct hw_osd_vout_csc_reg_s hw_osd_vout_csc_reg;
#ifndef CONFIG_AMLOGIC_C3_REMOVE
struct hw_osd_reg_s hw_osd_reg_array_g12a[HW_OSD_COUNT] = {
{
VIU_OSD1_CTRL_STAT,
@@ -1342,6 +1344,7 @@ struct hw_osd_reg_s hw_osd_reg_array_t3x[HW_OSD_COUNT] = {
OSD3_PROC_OUT_SIZE,
},
};
#endif
struct hw_osd_blend_reg_s hw_osd_blend_reg_legacy = {
/* osd_blend */
@@ -1373,6 +1376,7 @@ struct hw_osd_blend_reg_s hw_osd_blend_reg_legacy = {
OSD2_BLEND_SRC_CTRL
};
#ifndef CONFIG_AMLOGIC_C3_REMOVE
struct hw_osd_blend_reg_s hw_osd_blend_reg_s5 = {
/* osd_blend */
S5_VIU_OSD_BLEND_CTRL,
@@ -1402,6 +1406,7 @@ struct hw_osd_blend_reg_s hw_osd_blend_reg_s5 = {
S5_OSD1_BLEND_SRC_CTRL,
S5_OSD2_BLEND_SRC_CTRL
};
#endif
struct hw_osd_slice2ppc_reg_s hw_osd_slice2ppc_reg = {
OSD_2SLICE2PPC_IN_SIZE,
@@ -1416,70 +1421,6 @@ struct hw_osd_slice2ppc_reg_s hw_osd_slice2ppc_reg = {
OSD_SYS_2SLICE_HWIN_CUT
};
struct hw_osd_reg_s hw_osd_reg_array_a4[HW_OSD_COUNT] = {
{
A4_VOUT_OSD1_CTRL_STAT,
A4_VOUT_OSD1_CTRL_STAT2,
A4_VOUT_OSD1_COLOR_ADDR,
A4_VOUT_OSD1_COLOR,
A4_VOUT_OSD1_TCOLOR_AG0,
A4_VOUT_OSD1_TCOLOR_AG1,
A4_VOUT_OSD1_TCOLOR_AG2,
A4_VOUT_OSD1_TCOLOR_AG3,
A4_VOUT_OSD1_BLK0_CFG_W0,
A4_VOUT_OSD1_BLK0_CFG_W1,
A4_VOUT_OSD1_BLK0_CFG_W2,
A4_VOUT_OSD1_BLK0_CFG_W3,
A4_VOUT_OSD1_BLK0_CFG_W4,
A4_VOUT_OSD1_BLK1_CFG_W4,
A4_VOUT_OSD1_BLK2_CFG_W4,
A4_VOUT_OSD1_FIFO_CTRL_STAT,
A4_VOUT_OSD1_TEST_RDDATA,
A4_VOUT_OSD1_PROT_CTRL,
A4_VOUT_OSD1_MALI_UNPACK_CTRL,
A4_VOUT_OSD1_DIMM_CTRL,
A4_VOUT_OSD1_CSC_EN_CTRL,
A4_VOUT_OSD1_SCALE_COEF_IDX,
A4_VOUT_OSD1_SCALE_COEF,
A4_VOUT_OSD1_VSC_PHASE_STEP,
A4_VOUT_OSD1_VSC_INI_PHASE,
A4_VOUT_OSD1_VSC_CTRL0,
A4_VOUT_OSD1_HSC_PHASE_STEP,
A4_VOUT_OSD1_HSC_INI_PHASE,
A4_VOUT_OSD1_HSC_CTRL0,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_SC_DUMMY_DATA,
A4_VOUT_OSD1_SC_CTRL0,
A4_VOUT_OSD1_SCI_WH_M1,
A4_VOUT_OSD1_SCO_H_START_END,
A4_VOUT_OSD1_SCO_V_START_END,
A4_VOUT_OSD1_DB_FLT_CTRL,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
},
};
struct hw_osd_reg_s hw_osd_reg_array_c3[HW_OSD_COUNT] = {
{
VOUT_OSD1_CTRL_STAT,
@@ -1546,6 +1487,70 @@ struct hw_osd_reg_s hw_osd_reg_array_c3[HW_OSD_COUNT] = {
},
};
struct hw_osd_reg_s hw_osd_reg_array_a4[HW_OSD_COUNT] = {
{
A4_VOUT_OSD1_CTRL_STAT,
A4_VOUT_OSD1_CTRL_STAT2,
A4_VOUT_OSD1_COLOR_ADDR,
A4_VOUT_OSD1_COLOR,
A4_VOUT_OSD1_TCOLOR_AG0,
A4_VOUT_OSD1_TCOLOR_AG1,
A4_VOUT_OSD1_TCOLOR_AG2,
A4_VOUT_OSD1_TCOLOR_AG3,
A4_VOUT_OSD1_BLK0_CFG_W0,
A4_VOUT_OSD1_BLK0_CFG_W1,
A4_VOUT_OSD1_BLK0_CFG_W2,
A4_VOUT_OSD1_BLK0_CFG_W3,
A4_VOUT_OSD1_BLK0_CFG_W4,
A4_VOUT_OSD1_BLK1_CFG_W4,
A4_VOUT_OSD1_BLK2_CFG_W4,
A4_VOUT_OSD1_FIFO_CTRL_STAT,
A4_VOUT_OSD1_TEST_RDDATA,
A4_VOUT_OSD1_PROT_CTRL,
A4_VOUT_OSD1_MALI_UNPACK_CTRL,
A4_VOUT_OSD1_DIMM_CTRL,
A4_VOUT_OSD1_CSC_EN_CTRL,
A4_VOUT_OSD1_SCALE_COEF_IDX,
A4_VOUT_OSD1_SCALE_COEF,
A4_VOUT_OSD1_VSC_PHASE_STEP,
A4_VOUT_OSD1_VSC_INI_PHASE,
A4_VOUT_OSD1_VSC_CTRL0,
A4_VOUT_OSD1_HSC_PHASE_STEP,
A4_VOUT_OSD1_HSC_INI_PHASE,
A4_VOUT_OSD1_HSC_CTRL0,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_SC_DUMMY_DATA,
A4_VOUT_OSD1_SC_CTRL0,
A4_VOUT_OSD1_SCI_WH_M1,
A4_VOUT_OSD1_SCO_H_START_END,
A4_VOUT_OSD1_SCO_V_START_END,
A4_VOUT_OSD1_DB_FLT_CTRL,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
A4_VOUT_OSD1_UNSUPPORT,
},
};
struct hw_osd_vout_blend_reg_s hw_osd_vout_blend_reg_c3 = {
VPU_VOUT_IRQ_CTRL,
VPU_VOUT_BLEND_CTRL,
@@ -1788,7 +1793,6 @@ static unsigned int osd_h_filter_mode = 1;
static unsigned int osd_v_filter_mode = 1;
static unsigned int osd_auto_adjust_filter = 1;
static int osd_logo_index = 1;
static u32 osd_vpp_misc;
static u32 osd_vpp_misc_mask = OSD_RELATIVE_BITS;
static u32 osd_vpp1_bld_ctrl;
@@ -1805,7 +1809,6 @@ static u32 osd_mali_afbcd1_top_ctrl_mask = 0x00f7ffff;
static unsigned int rdarb_reqen_slv = 0xffff7f;
static unsigned int supsend_delay;
int enable_vd_zorder = 1;
static int vsync_enter_line_max;
static int vsync_exit_line_max;
static int line_threshold = 5;
@@ -4538,7 +4541,6 @@ static void irq_clr_c3(void)
data32 |= 0x01;
}
osd_reg_write(hw_osd_vout_blend_reg.vpu_vout_irq_ctrl, data32);
}
#ifdef FIQ_VSYNC
@@ -6372,8 +6374,7 @@ static void osd_set_two_ports(bool set)
{
static u32 data32[2];
if (osd_dev_hw.display_type == T7_DISPLAY ||
osd_dev_hw.display_type == S5_DISPLAY) {
if (osd_dev_hw.display_type == T7_DISPLAY || osd_dev_hw.display_type == S5_DISPLAY) {
if (osd_hw.osd_meson_dev.cpu_id ==
__MESON_CPU_MAJOR_ID_T3) {
/* set osd, video two port */
@@ -9453,8 +9454,7 @@ static int osd_setting_blending_scope(u32 index)
return -1;
}
if (index == OSD1 &&
osd_dev_hw.display_type != S5_DISPLAY &&
if (index == OSD1 && osd_dev_hw.display_type != S5_DISPLAY &&
!osd_hw.osd_meson_dev.osd0_sc_independ) {
bld_osd_h_start =
osd_hw.free_src_data[index].x_start;
@@ -14808,160 +14808,12 @@ static void osd_flag_regs_init(void)
osd_rdma_flag_init();
}
void osd_init_hw(u32 logo_loaded, u32 osd_probe,
struct osd_device_data_s *osd_meson)
static void osd_hw_init(u32 logo_loaded)
{
u32 idx, data32;
int err_num = 0;
#ifdef CONFIG_AMLOGIC_MEDIA_SECURITY
void *osd_secure_op[VPP_TOP_MAX] = {VSYNCOSD_WR_MPEG_REG_BITS,
VSYNCOSD_WR_MPEG_REG_BITS_VPP1,
VSYNCOSD_WR_MPEG_REG_BITS_VPP2};
#endif
#ifdef CONFIG_AMLOGIC_MEDIA_FB_OSD_SYNC_FENCE
int i = 0;
for (i = 0 ; i < HW_OSD_COUNT; i++)
displayed_bufs[i] = NULL;
#endif
osd_hw.fb_drvier_probe = osd_probe;
osd_hw.vpp_num = 1;
memcpy(&osd_hw.osd_meson_dev, osd_meson,
sizeof(struct osd_device_data_s));
if (osd_hw.osd_meson_dev.has_vpp1)
osd_hw.vpp_num++;
if (osd_hw.osd_meson_dev.has_vpp2)
osd_hw.vpp_num++;
osd_vpu_power_on();
if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_S5 ||
osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T3X)
memcpy(&hw_osd_reg_blend, &hw_osd_blend_reg_s5,
sizeof(struct hw_osd_blend_reg_s));
else
memcpy(&hw_osd_reg_blend, &hw_osd_blend_reg_legacy,
sizeof(struct hw_osd_blend_reg_s));
if (osd_hw.osd_meson_dev.has_slice2ppc)
memcpy(&hw_osd_reg_slice2ppc, &hw_osd_slice2ppc_reg,
sizeof(struct hw_osd_slice2ppc_reg_s));
if (osd_meson->osd_count == 3 &&
osd_meson->has_viu2) {
/* VIU1 2 OSD + 1 VIU2 1 OSD*/
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_tl1[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T7) {
/* 4 or 3 OSD, multi_afbc_core */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_t7[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T3 ||
osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T5W ||
osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T5M) {
/* 4 or 3 OSD, multi_afbc_core */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_t3[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_C3) {
/* one osd, no afbc, no osd blend */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_c3[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
memcpy(&hw_osd_vout_blend_reg, &hw_osd_vout_blend_reg_c3,
sizeof(struct hw_osd_vout_blend_reg_s));
memcpy(&hw_osd_vout_csc_reg, &hw_osd_vout_csc_reg_c3,
sizeof(struct hw_osd_vout_csc_reg_s));
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_A4) {
/* one osd, no afbc, no osd blend */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_a4[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
memcpy(&hw_osd_vout_blend_reg, &hw_osd_vout_blend_reg_a4,
sizeof(struct hw_osd_vout_blend_reg_s));
memcpy(&hw_osd_vout_csc_reg, &hw_osd_vout_csc_reg_a4,
sizeof(struct hw_osd_vout_csc_reg_s));
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_S5) {
/* 2 OSD (OSD1 + OSD3), multi_afbc_core */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_s5[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T3X) {
/* 3 OSD, multi_afbc_core */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_t3x[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
} else {
/* VIU1 3 OSD + 1 VIU2 1 OSD or VIU1 2 OSD*/
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_g12a[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
}
if (osd_dev_hw.display_type == T7_DISPLAY ||
osd_dev_hw.display_type == S5_DISPLAY) {
if (osd_meson->cpu_id >= __MESON_CPU_MAJOR_ID_T3X) {
memcpy(&venc_regs[0], &venc_regs_t3x[0],
sizeof(struct vpu_venc_regs) * 3);
} else {
memcpy(&venc_regs[0], &venc_regs_t7[0],
sizeof(struct vpu_venc_regs) * 3);
}
}
if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_GXTVBB) {
#ifndef CONFIG_AMLOGIC_REMOVE_OLD
backup_regs_init(HW_RESET_AFBCD_REGS);
#endif
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_GXM) {
#ifndef CONFIG_AMLOGIC_REMOVE_OLD
backup_regs_init(HW_RESET_OSD1_REGS);
#endif
} else if ((osd_meson->cpu_id >= __MESON_CPU_MAJOR_ID_GXL) &&
osd_meson->cpu_id <= __MESON_CPU_MAJOR_ID_TXL) {
#ifndef CONFIG_AMLOGIC_REMOVE_OLD
backup_regs_init(HW_RESET_OSD1_REGS);
#endif
} else if (osd_meson->cpu_id >= __MESON_CPU_MAJOR_ID_G12A) {
if (osd_dev_hw.display_type != C3_DISPLAY) {
if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_G12A)
backup_regs_init(HW_RESET_MALI_AFBCD_REGS);
else
backup_regs_init(HW_RESET_NONE);
}
} else {
backup_regs_init(HW_RESET_NONE);
}
/*for c3 irq clr*/
if (osd_dev_hw.display_type == C3_DISPLAY)
irq_clr_c3();
osd_flag_regs_init();
recovery_regs_init();
/* set osd vpp rdma func */
set_rdma_func_handler();
for (idx = 0; idx < HW_REG_INDEX_MAX; idx++)
osd_hw.reg[idx].update_func =
hw_func_array[idx];
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM
osd_hdr_on = false;
#endif
osd_hw.hw_reset_flag = HW_RESET_NONE;
osd_hw.hwc_enable[VIU1] = 0;
osd_hw.hwc_enable[VIU2] = 0;
if (osd_hw.osd_meson_dev.osd_ver == OSD_NORMAL) {
osd_hw.hw_cursor_en = 1;
} else if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE) {
osd_hw.hw_cursor_en = 0;
/* g12a and g12b need delay */
supsend_delay = 50;
}
if (osd_hw.osd_meson_dev.has_rdma)
osd_hw.hw_rdma_en = 1;
/*close gamma only for axg*/
if (osd_hw.osd_meson_dev.osd_ver == OSD_SIMPLE)
osd_reg_write(L_GAMMA_CNTL_PORT, 0);
@@ -15050,7 +14902,9 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
data32);
if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE)
osd_setting_default_hwc();
} else if (osd_hw.osd_meson_dev.cpu_id ==
}
if (osd_hw.osd_meson_dev.cpu_id ==
__MESON_CPU_MAJOR_ID_T7) {
osd_mali_afbcd_top_ctrl =
osd_reg_read(MALI_AFBCD_TOP_CTRL) & osd_mali_afbcd_top_ctrl_mask;
@@ -15062,6 +14916,7 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
osd_mali_afbcd1_top_ctrl &= ~(1 << 20);
notify_to_amdv();
}
if (osd_hw.osd_meson_dev.osd_ver <= OSD_NORMAL &&
osd_dev_hw.display_type != C3_DISPLAY) {
osd_vpp_misc =
@@ -15081,42 +14936,7 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
osd_hw.order[OSD1] = OSD_ORDER_01;
}
} else if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE) {
osd_hw.order[OSD1] = LAYER_1;
osd_hw.order[OSD2] = LAYER_2;
osd_hw.order[OSD3] = LAYER_3;
for (idx = 0; idx < VIU_COUNT; idx++) {
osd_hw.disp_info[idx].background_w = 1920;
osd_hw.disp_info[idx].background_h = 1080;
osd_hw.disp_info[idx].fullscreen_w = 1920;
osd_hw.disp_info[idx].fullscreen_h = 1080;
osd_hw.disp_info[idx].position_x = 0;
osd_hw.disp_info[idx].position_y = 0;
osd_hw.disp_info[idx].position_w = 1920;
osd_hw.disp_info[idx].background_h = 1080;
osd_hw.vinfo_width[idx] = 1920;
osd_hw.vinfo_height[idx] = 1080;
}
if ((osd_hw.osd_meson_dev.cpu_id ==
__MESON_CPU_MAJOR_ID_G12A) ||
((osd_hw.osd_meson_dev.cpu_id ==
__MESON_CPU_MAJOR_ID_G12B) &&
is_meson_rev_a()))
osd_hw.workaround_line = 1;
for (idx = 0; idx < osd_hw.osd_meson_dev.osd_count; idx++) {
osd_hw.premult_en[idx] = 0;
osd_hw.osd_afbcd[idx].format = COLOR_INDEX_32_ABGR;
osd_hw.osd_afbcd[idx].inter_format =
MALI_AFBC_32X8_PIXEL << 1 |
MALI_AFBC_SPLIT_ON;
osd_hw.osd_afbcd[idx].afbc_start = 0;
osd_hw.osd_afbcd[idx].out_addr_id = idx + 1;
if (osd_hw.osd_meson_dev.cpu_id ==
__MESON_CPU_MAJOR_ID_G12A) {
osd_hw.afbc_force_reset = 1;
osd_hw.afbc_regs_backup = 1;
}
if (idx < osd_hw.osd_meson_dev.viu1_osd_count) {
/* TODO: temp set at here,
* need move it to uboot
@@ -15142,12 +14962,19 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
} else {
osd_hw.powered[idx] = 0;
}
osd_set_deband(idx, osd_hw.osd_deband_enable[idx]);
}
osd_set_basic_urgent(true);
if (osd_hw.osd_meson_dev.cpu_id !=
__MESON_CPU_MAJOR_ID_TXHD2 &&
osd_hw.osd_meson_dev.cpu_id !=
__MESON_CPU_MAJOR_ID_S1A )
__MESON_CPU_MAJOR_ID_S1A &&
osd_hw.osd_meson_dev.cpu_id !=
__MESON_CPU_MAJOR_ID_S7 &&
osd_hw.osd_meson_dev.cpu_id !=
__MESON_CPU_MAJOR_ID_T7 &&
osd_hw.osd_meson_dev.cpu_id !=
__MESON_CPU_MAJOR_ID_S7D)
osd_set_two_ports(true);
if (osd_dev_hw.prevsync_support) {
u32 vpp0_pre_go_field = 0;
@@ -15208,6 +15035,7 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
get_output_device_id(OSD4));
}
}
/* disable deband as default */
if (osd_hw.osd_meson_dev.has_deband) {
if (osd_dev_hw.display_type != C3_DISPLAY)
@@ -15215,6 +15043,247 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
else
osd_reg_write(VOUT_OSD1_DB_FLT_CTRL, 0);
}
if (osd_hw.osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_AXG) {
data32 = osd_reg_read
(hw_osd_reg_array[OSD1].osd_fifo_ctrl_stat);
/* bit[9:5]: HOLD_FIFO_LINES */
data32 &= ~(0x1f << 5);
data32 |= 0x18 << 5;
osd_reg_write(hw_osd_reg_array[OSD1].osd_fifo_ctrl_stat,
data32);
}
if (osd_hw.osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_TXHD2 &&
osd_hw.osd_meson_dev.has_vpp1) {
set_vpp_osd1_rgb2yuv(1);
set_vpp_osd2_rgb2yuv(0);
} else if (osd_hw.osd_meson_dev.osd_rgb2yuv == 1) {
set_vpp_osd1_rgb2yuv(1);
set_vpp_osd2_rgb2yuv(1);
}
if (osd_dev_hw.display_type == C3_DISPLAY &&
osd_hw.osd_meson_dev.osd_rgb2yuv)
osd1_matrix_yuv2rgb(RGB2YUV);
if (osd_hw.hw_rdma_en) {
osd_rdma_enable(VPU_VPP0, 2);
if (osd_hw.osd_meson_dev.has_vpp1 &&
osd_hw.display_dev_cnt == 2)
osd_rdma_enable(VPU_VPP1, 2);
if (osd_hw.osd_meson_dev.has_vpp2 &&
osd_hw.display_dev_cnt == 3)
osd_rdma_enable(VPU_VPP2, 2);
} else {
osd_hw.afbc_force_reset = 0;
}
/* temp set */
for (idx = 0; idx < osd_hw.osd_meson_dev.viu1_osd_count; idx++) {
osd_hw.use_h_filter_mode[idx] = 0xff;
osd_hw.use_v_filter_mode[idx] = 0xff;
osd_update_coef(idx);
}
}
void osd_init_hw(u32 logo_loaded, u32 osd_probe,
struct osd_device_data_s *osd_meson)
{
u32 idx;
int err_num = 0;
#ifdef CONFIG_AMLOGIC_MEDIA_SECURITY
void *osd_secure_op[VPP_TOP_MAX] = {VSYNCOSD_WR_MPEG_REG_BITS,
VSYNCOSD_WR_MPEG_REG_BITS_VPP1,
VSYNCOSD_WR_MPEG_REG_BITS_VPP2};
#endif
#ifdef CONFIG_AMLOGIC_MEDIA_FB_OSD_SYNC_FENCE
int i = 0;
for (i = 0 ; i < HW_OSD_COUNT; i++)
displayed_bufs[i] = NULL;
#endif
osd_hw.fb_drvier_probe = osd_probe;
osd_hw.vpp_num = 1;
memcpy(&osd_hw.osd_meson_dev, osd_meson,
sizeof(struct osd_device_data_s));
if (osd_hw.osd_meson_dev.has_vpp1)
osd_hw.vpp_num++;
if (osd_hw.osd_meson_dev.has_vpp2)
osd_hw.vpp_num++;
#ifndef CONFIG_AMLOGIC_C3_REMOVE
if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_S5 ||
osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T3X)
memcpy(&hw_osd_reg_blend, &hw_osd_blend_reg_s5,
sizeof(struct hw_osd_blend_reg_s));
else
#endif
memcpy(&hw_osd_reg_blend, &hw_osd_blend_reg_legacy,
sizeof(struct hw_osd_blend_reg_s));
if (osd_hw.osd_meson_dev.has_slice2ppc)
memcpy(&hw_osd_reg_slice2ppc, &hw_osd_slice2ppc_reg,
sizeof(struct hw_osd_slice2ppc_reg_s));
if (osd_meson->osd_count == 3 &&
osd_meson->has_viu2) {
/* VIU1 2 OSD + 1 VIU2 1 OSD*/
#ifndef CONFIG_AMLOGIC_C3_REMOVE
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_tl1[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T7) {
/* 4 or 3 OSD, multi_afbc_core */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_t7[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T3 ||
osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T5W ||
osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T5M) {
/* 4 or 3 OSD, multi_afbc_core */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_t3[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
}
#endif
else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_C3) {
/* one osd, no afbc, no osd blend */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_c3[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
memcpy(&hw_osd_vout_blend_reg, &hw_osd_vout_blend_reg_c3,
sizeof(struct hw_osd_vout_blend_reg_s));
memcpy(&hw_osd_vout_csc_reg, &hw_osd_vout_csc_reg_c3,
sizeof(struct hw_osd_vout_csc_reg_s));
}
#ifndef CONFIG_AMLOGIC_C3_REMOVE
else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_A4) {
/* one osd, no afbc, no osd blend */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_a4[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
memcpy(&hw_osd_vout_blend_reg, &hw_osd_vout_blend_reg_a4,
sizeof(struct hw_osd_vout_blend_reg_s));
memcpy(&hw_osd_vout_csc_reg, &hw_osd_vout_csc_reg_a4,
sizeof(struct hw_osd_vout_csc_reg_s));
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_S5) {
/* 2 OSD (OSD1 + OSD3), multi_afbc_core */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_s5[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_T3X) {
/* 3 OSD, multi_afbc_core */
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_t3x[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
} else {
/* VIU1 3 OSD + 1 VIU2 1 OSD or VIU1 2 OSD*/
memcpy(&hw_osd_reg_array[0], &hw_osd_reg_array_g12a[0],
sizeof(struct hw_osd_reg_s) *
osd_hw.osd_meson_dev.osd_count);
}
#endif
if (osd_dev_hw.display_type == T7_DISPLAY ||
osd_dev_hw.display_type == S5_DISPLAY) {
if (osd_meson->cpu_id >= __MESON_CPU_MAJOR_ID_T3X) {
memcpy(&venc_regs[0], &venc_regs_t3x[0],
sizeof(struct vpu_venc_regs) * 3);
} else {
memcpy(&venc_regs[0], &venc_regs_t7[0],
sizeof(struct vpu_venc_regs) * 3);
}
}
if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_GXTVBB) {
#ifndef CONFIG_AMLOGIC_REMOVE_OLD
backup_regs_init(HW_RESET_AFBCD_REGS);
#endif
} else if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_GXM) {
#ifndef CONFIG_AMLOGIC_REMOVE_OLD
backup_regs_init(HW_RESET_OSD1_REGS);
#endif
} else if ((osd_meson->cpu_id >= __MESON_CPU_MAJOR_ID_GXL) &&
osd_meson->cpu_id <= __MESON_CPU_MAJOR_ID_TXL) {
#ifndef CONFIG_AMLOGIC_REMOVE_OLD
backup_regs_init(HW_RESET_OSD1_REGS);
#endif
} else if (osd_meson->cpu_id >= __MESON_CPU_MAJOR_ID_G12A) {
if (osd_dev_hw.display_type != C3_DISPLAY) {
if (osd_meson->cpu_id == __MESON_CPU_MAJOR_ID_G12A)
backup_regs_init(HW_RESET_MALI_AFBCD_REGS);
else
backup_regs_init(HW_RESET_NONE);
}
} else {
backup_regs_init(HW_RESET_NONE);
}
/*for c3 irq clr*/
if (osd_dev_hw.display_type == C3_DISPLAY)
irq_clr_c3();
recovery_regs_init();
/* set osd vpp rdma func */
set_rdma_func_handler();
for (idx = 0; idx < HW_REG_INDEX_MAX; idx++)
osd_hw.reg[idx].update_func =
hw_func_array[idx];
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM
osd_hdr_on = false;
#endif
osd_hw.hw_reset_flag = HW_RESET_NONE;
osd_hw.hwc_enable[VIU1] = 0;
osd_hw.hwc_enable[VIU2] = 0;
if (osd_hw.osd_meson_dev.osd_ver == OSD_NORMAL) {
osd_hw.hw_cursor_en = 1;
} else if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE) {
osd_hw.hw_cursor_en = 0;
/* g12a and g12b need delay */
supsend_delay = 50;
}
if (osd_hw.osd_meson_dev.has_rdma)
osd_hw.hw_rdma_en = 1;
if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE) {
osd_hw.order[OSD1] = LAYER_1;
osd_hw.order[OSD2] = LAYER_2;
osd_hw.order[OSD3] = LAYER_3;
for (idx = 0; idx < VIU_COUNT; idx++) {
osd_hw.disp_info[idx].background_w = 1920;
osd_hw.disp_info[idx].background_h = 1080;
osd_hw.disp_info[idx].fullscreen_w = 1920;
osd_hw.disp_info[idx].fullscreen_h = 1080;
osd_hw.disp_info[idx].position_x = 0;
osd_hw.disp_info[idx].position_y = 0;
osd_hw.disp_info[idx].position_w = 1920;
osd_hw.disp_info[idx].background_h = 1080;
osd_hw.vinfo_width[idx] = 1920;
osd_hw.vinfo_height[idx] = 1080;
}
if ((osd_hw.osd_meson_dev.cpu_id ==
__MESON_CPU_MAJOR_ID_G12A) ||
((osd_hw.osd_meson_dev.cpu_id ==
__MESON_CPU_MAJOR_ID_G12B) &&
is_meson_rev_a()))
osd_hw.workaround_line = 1;
for (idx = 0; idx < osd_hw.osd_meson_dev.osd_count; idx++) {
osd_hw.premult_en[idx] = 0;
osd_hw.osd_afbcd[idx].format = COLOR_INDEX_32_ABGR;
osd_hw.osd_afbcd[idx].inter_format =
MALI_AFBC_32X8_PIXEL << 1 |
MALI_AFBC_SPLIT_ON;
osd_hw.osd_afbcd[idx].afbc_start = 0;
osd_hw.osd_afbcd[idx].out_addr_id = idx + 1;
if (osd_hw.osd_meson_dev.cpu_id ==
__MESON_CPU_MAJOR_ID_G12A) {
osd_hw.afbc_force_reset = 1;
osd_hw.afbc_regs_backup = 1;
}
}
}
for (idx = 0; idx < osd_hw.osd_meson_dev.osd_count; idx++) {
osd_hw.updated[idx] = 0;
osd_hw.urgent[idx] = 1;
@@ -15268,12 +15337,12 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
* osd_hw.rotation_pandata[idx].y_start = 0;
*/
osd_set_dummy_data(idx, 0xff);
osd_set_deband(idx, osd_hw.osd_deband_enable[idx]);
#ifdef DEBUG_FIRSTFRAME
set_force_dimm(idx);
set_force_save_frames(idx);
#endif
}
osd_hw_init(logo_loaded);
/* hwc_enable == 0 handler */
#ifdef CONFIG_AMLOGIC_MEDIA_FB_OSD_SYNC_FENCE
osd_hw.osd_fence[VIU1][DISABLE].sync_fence_handler =
@@ -15313,23 +15382,7 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
osd_hw.osd_preblend_en = 0;
osd_hw.fix_target_width = 1920;
osd_hw.fix_target_height = 1080;
if (osd_hw.osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_AXG) {
data32 = osd_reg_read
(hw_osd_reg_array[OSD1].osd_fifo_ctrl_stat);
/* bit[9:5]: HOLD_FIFO_LINES */
data32 &= ~(0x1f << 5);
data32 |= 0x18 << 5;
osd_reg_write(hw_osd_reg_array[OSD1].osd_fifo_ctrl_stat,
data32);
}
if (osd_hw.osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_TXHD2 &&
osd_hw.osd_meson_dev.has_vpp1) {
set_vpp_osd1_rgb2yuv(1);
set_vpp_osd2_rgb2yuv(0);
} else if (osd_hw.osd_meson_dev.osd_rgb2yuv == 1) {
set_vpp_osd1_rgb2yuv(1);
set_vpp_osd2_rgb2yuv(1);
}
if (osd_hw.fb_drvier_probe) {
#ifdef CONFIG_AMLOGIC_MEDIA_FB_OSD_SYNC_FENCE
INIT_LIST_HEAD(&post_fence_list[VIU1]);
@@ -15373,17 +15426,6 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
request_fiq(INT_VIU_VSYNC, &osd_viu2_fiq_isr);
#endif
}
if (osd_hw.hw_rdma_en) {
osd_rdma_enable(VPU_VPP0, 2);
if (osd_hw.osd_meson_dev.has_vpp1 &&
osd_hw.display_dev_cnt == 2)
osd_rdma_enable(VPU_VPP1, 2);
if (osd_hw.osd_meson_dev.has_vpp2 &&
osd_hw.display_dev_cnt == 3)
osd_rdma_enable(VPU_VPP2, 2);
} else {
osd_hw.afbc_force_reset = 0;
}
#ifdef CONFIG_AMLOGIC_MEDIA_FB_OSD_SYNC_FENCE
affinity_set_init();
#endif
@@ -15394,6 +15436,9 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
#endif
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
register_osd_func(get_osd_status);
#endif
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM
//register_osd_status_cb(get_osd_status);
#endif
if (osd_hw.osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_TXHD2)
enable_vd_zorder = 0;
@@ -15877,6 +15922,9 @@ void osd_suspend_hw(void)
void osd_resume_hw(void)
{
/* for hw reg recovery */
osd_hw_init(0);
if (osd_hw.osd_meson_dev.osd_ver <= OSD_NORMAL &&
osd_dev_hw.display_type != C3_DISPLAY) {
if (osd_hw.reg_status_save &
drivers/media/osd/osd_rdma.c
+11 -8
View File
@@ -36,6 +36,7 @@
#endif
#include "osd_rdma.h"
#include "osd_hw.h"
#include "osd_fb.h"
#include "osd_backup.h"
#include "osd_log.h"
#include "osd_fb.h"
@@ -86,8 +87,7 @@ static int rdma_reject_cnt[2];
static int rdma_done_line[VPP_NUM];
static int g_osd_rdma_item_count;
static int g_osd_rdma_item_count_max;
void *memcpy(void *dest, const void *src, size_t len);
//void *memcpy(void *dest, const void *src, size_t len);
static inline void spin_lock_irqsave_vpp(u32 vpp_index, unsigned long *flags)
{
@@ -271,7 +271,7 @@ u32 rdma_detect_reg;
void osd_rdma_flag_init(void)
{
if (osd_dev_hw.display_type == S5_DISPLAY) {
if (osd_dev_hw.s5_display) {
/* no OSD2 for S5 */
osd_rdma_flag_reg[VPP0] = S5_VIU_OSD1_TCOLOR_AG3;
osd_rdma_flag_reg[VPP1] = S5_VIU_OSD1_TCOLOR_AG2;
@@ -587,9 +587,10 @@ static int update_table_item(u32 vpp_index, u32 addr, u32 val, u8 irq_mode)
int reject1 = 0, reject2 = 0, ret = 0;
ulong paddr;
static int pace_logging[VPP_NUM];
int handle = osd_rdma_handle[vpp_index];
#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
if (item_count[vpp_index] > 500 || rdma_reset_trigger_flag) {
if (item_count[vpp_index] > 500 || rdma_reset_trigger_flag[handle]) {
//#else
// if (item_count[vpp_index] > 500) {
#endif
@@ -1870,18 +1871,20 @@ void enable_vsync_rdma(u32 vpp_index)
void osd_rdma_interrupt_done_clear(u32 vpp_index)
{
int handle = osd_rdma_handle[vpp_index];
vsync_irq_count[vpp_index]++;
#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
if (osd_rdma_done[vpp_index])
rdma_watchdog_setting(0);
rdma_watchdog_setting(0, handle);
else
rdma_watchdog_setting(1);
rdma_watchdog_setting(1, handle);
#endif
osd_rdma_done[vpp_index] = false;
#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
if (rdma_reset_trigger_flag) {
if (rdma_reset_trigger_flag[handle]) {
u32 rdma_status;
rdma_status =
@@ -1890,7 +1893,7 @@ void osd_rdma_interrupt_done_clear(u32 vpp_index)
rdma_status);
osd_rdma_enable(vpp_index, 0);
osd_rdma_enable(vpp_index, 2);
rdma_reset_trigger_flag = 0;
rdma_reset_trigger_flag[handle] = 0;
}
#endif
}
drivers/media/osd/osd_rdma.h
+2 -2
View File
@@ -10,7 +10,7 @@
#include "osd_io.h"
#include "osd_reg.h"
extern int rdma_reset_trigger_flag;
extern int rdma_reset_trigger_flag[];
extern int rdma_mgr_irq_request;
extern u32 osd_rdma_flag_reg[];
extern u32 rdma_detect_reg;
@@ -99,7 +99,7 @@ enum {
~OSD_RDMA_FLAG_REJECT)))
int rdma_watchdog_setting(int flag);
int rdma_watchdog_setting(int flag, int handle);
int read_rdma_table(u32 vpp_index);
int osd_rdma_enable(u32 vpp_index, u32 enable);
int osd_rdma_reset_and_flush(u32 output_index, u32 reset_bit);