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amdv: top1 setting not match cmodel [1/1]
PD#SWPL-129146 Problem: top1 setting not match cmodel Solution: add fps,dumpsample,dynamic cfg config Verify: T3X Change-Id: I8415dd17e750c55034db131bba66e0fa362a0992 Signed-off-by: yao liu <yao.liu@amlogic.com>
This commit is contained in:
committed by
gerrit autosubmit
parent
4686f9216b
commit
aa751d4a2c
@@ -448,7 +448,7 @@ MODULE_PARM_DESC(ambient_test_mode, "\n ambient_test_mode\n");
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struct ambient_cfg_s ambient_darkdetail = {16, 0, 0, 0, 0, 0, 1};
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static int content_fps = 24;
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u32 content_fps = 24;
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int gd_rf_adjust;
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int enable_vf_check;
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static u32 last_vf_valid_crc;
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@@ -9,7 +9,7 @@
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/*#define V2_4_3*/
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/* driver version */
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#define DRIVER_VER "202300627"
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#define DRIVER_VER "202300705"
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#include <linux/types.h>
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#include "amdv_pq_config.h"
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@@ -898,6 +898,7 @@ extern u32 fix_data;
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extern u8 *y_vaddr;
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extern u8 *uv_vaddr;
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extern bool force_enable_top12_lut;
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extern u32 content_fps;
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/************/
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#define pr_dv_dbg(fmt, args...)\
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@@ -1218,12 +1218,12 @@ int amdv_parse_metadata_hw5_top1(struct vframe_s *vf)
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v_inst_info->src_format = src_format;
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v_inst_info->input_mode = input_mode;
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v_inst_info->video_width = w;
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v_inst_info->video_height = h;
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v_inst_info->video_width = w;//top1_vd_info.width;
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v_inst_info->video_height = h;//top1_vd_info.height;
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tv_hw5_setting->top1.src_format = src_format;
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tv_hw5_setting->top1.video_width = w;
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tv_hw5_setting->top1.video_height = h;
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tv_hw5_setting->top1.video_width = w;//top1_vd_info.width;
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tv_hw5_setting->top1.video_height = h;//top1_vd_info.height;
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tv_hw5_setting->top1.input_mode = input_mode;
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tv_hw5_setting->top1.in_md = v_inst_info->md_buf[v_inst_info->current_id];
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@@ -1244,9 +1244,9 @@ int amdv_parse_metadata_hw5_top1(struct vframe_s *vf)
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tv_hw5_setting->enable_debug = debug_ko;
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tv_hw5_setting->dither_bdp = 0;//dither bitdepth,0=>no dither
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tv_hw5_setting->L1L4_distance = -1;
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tv_hw5_setting->num_ext_downsamplers = 0;//todo
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tv_hw5_setting->num_ext_downsamplers = 1;//todo
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tv_hw5_setting->force_num_slices = 0;
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tv_hw5_setting->frame_rate = 23976;
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tv_hw5_setting->frame_rate = content_fps;//24000
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if (run_control_path) {
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/*step1: top1 frame N*/
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@@ -1974,9 +1974,9 @@ int amdv_parse_metadata_hw5(struct vframe_s *vf,
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tv_hw5_setting->enable_debug = debug_ko;
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tv_hw5_setting->dither_bdp = 0;//dither bitdepth,0=>no dither
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tv_hw5_setting->L1L4_distance = -1;
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tv_hw5_setting->num_ext_downsamplers = 0;//todo
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tv_hw5_setting->num_ext_downsamplers = 1;//todo
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tv_hw5_setting->force_num_slices = 0;
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tv_hw5_setting->frame_rate = 23976;
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tv_hw5_setting->frame_rate = content_fps;
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if (run_control_path) {
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/*step2: top2 frame N-1*/
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@@ -364,6 +364,110 @@ struct dynamic_cfg_s dynamic_test_cfg[AMBIENT_CFG_FRAMES] = {
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{ 96, 0, 0, 0, 0, 0, 0, 1, 19661, 0, 0, 0},
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};
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struct dynamic_cfg_s dynamic_test_cfg_2[AMBIENT_CFG_FRAMES] = {
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/* update_flag, ambient, rear, front, whitex, whitey,dark_detail */
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/*precision_rendering_upd_mode,precision_rendering_strength*/
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/*global_dimming_upd_mode,six_vector_upd_mode,l1l4_filtering_upd_mode*/
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{25, 1, 0, 24942, 0, 0, 1, 0, 0, 0, 0, 0},
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{24, 0, 0, 24942, 0, 0, 1, 0, 0, 0, 0, 0},
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{24, 0, 0, 24942, 0, 0, 1, 0, 0, 0, 0, 0},
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{24, 0, 0, 24942, 0, 0, 1, 0, 0, 0, 0, 0},
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{24, 0, 0, 24942, 0, 0, 1, 0, 0, 0, 0, 0},
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{28, 1, 0, 24942, 0, 0, 1, 0, 0, 0, 0, 0},
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{31, 1, 5, 0, 32768, 0, 1, 0, 0, 0, 0, 0},
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{31, 1, 5, 30000, 0, 32768, 1, 0, 0, 0, 0, 0},
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{31, 1, 5, 24942, 32768, 32768, 1, 0, 0, 0, 0, 0},
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{30, 1, 5276, 24942, 8454, 6947, 1, 0, 0, 0, 0, 0},
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{24, 0, 5276, 24942, 8454, 6947, 0, 0, 0, 0, 0, 0},
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{24, 0, 5276, 24942, 8454, 6947, 0, 0, 0, 0, 0, 0},
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{24, 0, 5276, 24942, 8454, 6947, 0, 0, 0, 0, 0, 0},
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{24, 0, 5276, 24942, 8454, 6947, 0, 0, 0, 0, 0, 0},
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{24, 0, 5276, 24942, 8454, 6947, 0, 0, 0, 0, 0, 0},
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{152, 0, 5276, 24942, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{152, 0, 5276, 24942, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{152, 0, 5276, 24942, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{152, 0, 5276, 24942, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{152, 0, 5276, 24942, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{159, 1, 2204, 23229, 590, 30638, 1, 0, 0, 1, 0, 0},
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{159, 1, 4646, 25899, 31687, 9765, 1, 0, 0, 1, 0, 0},
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{156, 1, 4646, 25899, 492, 30114, 1, 0, 0, 1, 0, 0},
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{156, 1, 4646, 25899, 11633, 13402, 1, 0, 0, 1, 0, 0},
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{159, 1, 6276, 23229, 98, 16056, 1, 0, 0, 1, 0, 0},
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{14, 1, 5276, 23229, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{18, 1, 6558, 23229, 8454, 6947, 0, 0, 0, 1, 0, 0},
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{18, 1, 355, 23229, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{31, 1, 6898, 9651, 30540, 17105, 1, 0, 0, 1, 0, 0},
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{139, 1, 5558, 838, 30540, 17105, 1, 0, 0, 1, 0, 0},
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{157, 1, 5558, 8462, 7438, 655, 1, 0, 0, 0, 0, 0},
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{8, 0, 5558, 8462, 7438, 655, 1, 0, 0, 0, 0, 0},
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{0, 0, 5558, 8462, 7438, 655, 1, 0, 0, 0, 0, 0},
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{0, 0, 5558, 8462, 7438, 655, 1, 0, 0, 0, 0, 0},
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{9, 1, 5558, 12792, 7438, 655, 1, 0, 0, 0, 0, 0},
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{4, 1, 5558, 12792, 30179, 14909, 1, 0, 0, 0, 0, 0},
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{11, 1, 1287, 16711, 30179, 14909, 1, 0, 0, 0, 0, 0},
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{15, 1, 991, 9667, 14451, 9699, 1, 0, 0, 0, 0, 0},
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{12, 1, 991, 9667, 12747, 5636, 1, 0, 0, 0, 0, 0},
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{10, 1, 1382, 9667, 12747, 5636, 1, 0, 0, 0, 0, 0},
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{9, 1, 1382, 14647, 12747, 5636, 1, 0, 0, 0, 0, 0},
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{10, 1, 9080, 14647, 12747, 5636, 1, 0, 0, 0, 0, 0},
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{12, 1, 9080, 14647, 21922, 16056, 1, 0, 0, 0, 0, 0},
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{11, 1, 6840, 13834, 21922, 16056, 1, 0, 0, 0, 0, 0},
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{13, 1, 6840, 21597, 25756, 26673, 1, 0, 0, 0, 0, 0},
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{5, 1, 6840, 17788, 3572, 28508, 1, 0, 0, 0, 0, 0},
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};
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struct dynamic_cfg_s dynamic_test_cfg_3[AMBIENT_CFG_FRAMES] = {
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/* update_flag, ambient, rear, front, whitex, whitey,dark_detail */
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/*precision_rendering_upd_mode,precision_rendering_strength*/
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/*global_dimming_upd_mode,six_vector_upd_mode,l1l4_filtering_upd_mode*/
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{31, 1, 5, 24942, 32768, 32768, 1, 0, 0, 0, 0, 0},
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{24, 0, 5, 24942, 32768, 32768, 1, 0, 0, 0, 0, 0},
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{24, 0, 5, 24942, 32768, 32768, 1, 0, 0, 0, 0, 0},
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{24, 0, 5, 24942, 32768, 32768, 1, 0, 0, 0, 0, 0},
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{24, 0, 5, 24942, 32768, 32768, 1, 0, 0, 0, 0, 0},
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{28, 1, 5, 24942, 0, 0, 1, 0, 0, 0, 0, 0},
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{31, 1, 5, 0, 32768, 0, 1, 0, 0, 0, 0, 0},
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{31, 1, 5, 30000, 0, 32768, 1, 0, 0, 0, 0, 0},
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{31, 1, 5, 24942, 32768, 32768, 1, 0, 0, 0, 0, 0},
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{30, 1, 5276, 24942, 8454, 6947, 1, 0, 0, 0, 0, 0},
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{24, 0, 5276, 24942, 8454, 6947, 0, 0, 0, 0, 0, 0},
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{24, 0, 5276, 24942, 8454, 6947, 0, 0, 0, 0, 0, 0},
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{24, 0, 5276, 24942, 8454, 6947, 0, 0, 0, 0, 0, 0},
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{24, 0, 5276, 24942, 8454, 6947, 0, 0, 0, 0, 0, 0},
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{24, 0, 5276, 24942, 8454, 6947, 0, 0, 0, 0, 0, 0},
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{152, 0, 5276, 24942, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{152, 0, 5276, 24942, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{152, 0, 5276, 24942, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{152, 0, 5276, 24942, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{152, 0, 5276, 24942, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{159, 1, 2204, 23229, 590, 30638, 1, 0, 0, 1, 0, 0},
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{159, 1, 4646, 25899, 31687, 9765, 1, 0, 0, 1, 0, 0},
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{156, 1, 4646, 25899, 492, 30114, 1, 0, 0, 1, 0, 0},
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{156, 1, 4646, 25899, 11633, 13402, 1, 0, 0, 1, 0, 0},
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{159, 1, 6276, 23229, 98, 16056, 1, 0, 0, 1, 0, 0},
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{14, 1, 5276, 23229, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{18, 1, 6558, 23229, 8454, 6947, 0, 0, 0, 1, 0, 0},
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{18, 1, 355, 23229, 8454, 6947, 1, 0, 0, 1, 0, 0},
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{31, 1, 6898, 9651, 30540, 17105, 1, 0, 0, 1, 0, 0},
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{139, 1, 5558, 838, 30540, 17105, 1, 0, 0, 1, 0, 0},
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{157, 1, 5558, 8462, 7438, 655, 1, 0, 0, 0, 0, 0},
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{8, 0, 5558, 8462, 7438, 655, 1, 0, 0, 0, 0, 0},
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{0, 0, 5558, 8462, 7438, 655, 1, 0, 0, 0, 0, 0},
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{0, 0, 5558, 8462, 7438, 655, 1, 0, 0, 0, 0, 0},
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{9, 1, 5558, 12792, 7438, 655, 1, 0, 0, 0, 0, 0},
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{4, 1, 5558, 12792, 30179, 14909, 1, 0, 0, 0, 0, 0},
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{11, 1, 1287, 16711, 30179, 14909, 1, 0, 0, 0, 0, 0},
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{15, 1, 991, 9667, 14451, 9699, 1, 0, 0, 0, 0, 0},
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{12, 1, 991, 9667, 12747, 5636, 1, 0, 0, 0, 0, 0},
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{10, 1, 1382, 9667, 12747, 5636, 1, 0, 0, 0, 0, 0},
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{9, 1, 1382, 14647, 12747, 5636, 1, 0, 0, 0, 0, 0},
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{10, 1, 9080, 14647, 12747, 5636, 1, 0, 0, 0, 0, 0},
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{12, 1, 9080, 14647, 21922, 16056, 1, 0, 0, 0, 0, 0},
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{11, 1, 6840, 13834, 21922, 16056, 1, 0, 0, 0, 0, 0},
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{13, 1, 6840, 21597, 25756, 26673, 1, 0, 0, 0, 0, 0},
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{5, 1, 6840, 17788, 3572, 28508, 1, 0, 0, 0, 0, 0},
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};
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struct target_config def_tgt_display_cfg_bestpq = {
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36045,
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2,
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