mirror of
https://github.com/hardkernel/kernel_common_drivers.git
synced 2026-06-25 12:03:48 +09:00
Merge "hdr: fix multi slice cuva data update [1/1]" into amlogic-5.15-dev
This commit is contained in:
@@ -7202,6 +7202,7 @@ void hdr10_plus_process_update(int force_source_lumin,
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{
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int panel_lumin;
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struct vinfo_s *vinfo;
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int silce_mode = get_s5_silce_mode();
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if (vpp_index == VPP_TOP1)
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vinfo = get_current_vinfo2();
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@@ -7225,34 +7226,76 @@ void hdr10_plus_process_update(int force_source_lumin,
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hdr10_plus_ootf_gen(panel_lumin,
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force_source_lumin,
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&hdr10pgen_param);
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if (vd_path == VD1_PATH)
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hdr10p_ebzcurve_update(VD1_HDR,
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HDR10P_SDR,
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&hdr10pgen_param,
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vpp_index);
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else if (vd_path == VD2_PATH)
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if (vd_path == VD1_PATH) {
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if (silce_mode == VD1_1SLICE) {
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hdr10p_ebzcurve_update(VD1_HDR,
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HDR10P_SDR,
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&hdr10pgen_param,
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vpp_index);
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} else if (silce_mode == VD1_2SLICE) {
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hdr10p_ebzcurve_update(VD1_HDR,
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HDR10P_SDR,
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&hdr10pgen_param,
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vpp_index);
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hdr10p_ebzcurve_update(S5_VD1_SLICE1,
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HDR10P_SDR,
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&hdr10pgen_param,
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vpp_index);
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} else if (silce_mode == VD1_4SLICE) {
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hdr10p_ebzcurve_update(VD1_HDR,
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HDR10P_SDR,
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&hdr10pgen_param,
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vpp_index);
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hdr10p_ebzcurve_update(S5_VD1_SLICE1,
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HDR10P_SDR,
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&hdr10pgen_param,
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vpp_index);
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hdr10p_ebzcurve_update(S5_VD1_SLICE2,
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HDR10P_SDR,
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&hdr10pgen_param,
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vpp_index);
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hdr10p_ebzcurve_update(S5_VD1_SLICE3,
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HDR10P_SDR,
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&hdr10pgen_param,
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vpp_index);
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}
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} else if (vd_path == VD2_PATH) {
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hdr10p_ebzcurve_update(VD2_HDR,
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HDR10P_SDR,
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&hdr10pgen_param,
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vpp_index);
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else if (vd_path == VD3_PATH)
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} else if (vd_path == VD3_PATH) {
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hdr10p_ebzcurve_update(VD3_HDR,
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HDR10P_SDR,
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&hdr10pgen_param,
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vpp_index);
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}
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}
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EXPORT_SYMBOL(hdr10_plus_process_update);
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static void hdr10_tm_process_update(struct vframe_master_display_colour_s *p,
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enum vd_path_e vd_path, enum vpp_index_e vpp_index)
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{
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int silce_mode = get_s5_silce_mode();
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hdr10_tm_dynamic_proc(p);
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if (vd_path == VD1_PATH)
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hdr10_tm_update(VD1_HDR, HDR_SDR, vpp_index);
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else if (vd_path == VD2_PATH)
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if (vd_path == VD1_PATH) {
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if (silce_mode == VD1_1SLICE) {
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hdr10_tm_update(VD1_HDR, HDR_SDR, vpp_index);
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} else if (silce_mode == VD1_2SLICE) {
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hdr10_tm_update(VD1_HDR, HDR_SDR, vpp_index);
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hdr10_tm_update(S5_VD1_SLICE1, HDR_SDR, vpp_index);
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} else if (silce_mode == VD1_4SLICE) {
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hdr10_tm_update(VD1_HDR, HDR_SDR, vpp_index);
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hdr10_tm_update(S5_VD1_SLICE1, HDR_SDR, vpp_index);
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hdr10_tm_update(S5_VD1_SLICE2, HDR_SDR, vpp_index);
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hdr10_tm_update(S5_VD1_SLICE3, HDR_SDR, vpp_index);
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}
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} else if (vd_path == VD2_PATH) {
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hdr10_tm_update(VD2_HDR, HDR_SDR, vpp_index);
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else if (vd_path == VD3_PATH)
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} else if (vd_path == VD3_PATH) {
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hdr10_tm_update(VD3_HDR, HDR_SDR, vpp_index);
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}
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}
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static void cuva_hdr_process_update(enum hdr_type_e src_type,
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@@ -7262,6 +7305,7 @@ static void cuva_hdr_process_update(enum hdr_type_e src_type,
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{
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int proc_flag = 0;
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struct aml_cuva_data_s *cuva_data = get_cuva_data();
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int silce_mode = get_s5_silce_mode();
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if (src_type == CUVA_HDR_SOURCE) {
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if (proc_mode == PROC_CUVA_TO_SDR) {
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@@ -7293,42 +7337,97 @@ static void cuva_hdr_process_update(enum hdr_type_e src_type,
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if (src_type == CUVA_HDR_SOURCE) {
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if (proc_mode == PROC_CUVA_TO_SDR) {
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if (vd_path == VD1_PATH)
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cuva_hdr_update(VD1_HDR, CUVA_SDR, vpp_index);
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else if (vd_path == VD2_PATH)
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if (vd_path == VD1_PATH) {
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if (silce_mode == VD1_1SLICE) {
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cuva_hdr_update(VD1_HDR, CUVA_SDR, vpp_index);
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} else if (silce_mode == VD1_2SLICE) {
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cuva_hdr_update(VD1_HDR, CUVA_SDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE1, CUVA_SDR, vpp_index);
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} else if (silce_mode == VD1_4SLICE) {
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cuva_hdr_update(VD1_HDR, CUVA_SDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE1, CUVA_SDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE2, CUVA_SDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE3, CUVA_SDR, vpp_index);
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}
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} else if (vd_path == VD2_PATH) {
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cuva_hdr_update(VD2_HDR, CUVA_SDR, vpp_index);
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else if (vd_path == VD3_PATH)
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} else if (vd_path == VD3_PATH) {
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cuva_hdr_update(VD3_HDR, CUVA_SDR, vpp_index);
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}
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} else if (proc_mode == PROC_CUVA_TO_HDR) {
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if (vd_path == VD1_PATH)
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cuva_hdr_update(VD1_HDR, CUVA_HDR, vpp_index);
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else if (vd_path == VD2_PATH)
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if (vd_path == VD1_PATH) {
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if (silce_mode == VD1_1SLICE) {
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cuva_hdr_update(VD1_HDR, CUVA_HDR, vpp_index);
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} else if (silce_mode == VD1_2SLICE) {
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cuva_hdr_update(VD1_HDR, CUVA_HDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE1, CUVA_HDR, vpp_index);
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} else if (silce_mode == VD1_4SLICE) {
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cuva_hdr_update(VD1_HDR, CUVA_HDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE1, CUVA_HDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE2, CUVA_HDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE3, CUVA_HDR, vpp_index);
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}
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} else if (vd_path == VD2_PATH) {
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cuva_hdr_update(VD2_HDR, CUVA_HDR, vpp_index);
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else if (vd_path == VD3_PATH)
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} else if (vd_path == VD3_PATH) {
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cuva_hdr_update(VD3_HDR, CUVA_HDR, vpp_index);
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}
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}
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} else if (src_type == CUVA_HLG_SOURCE) {
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if (proc_mode == PROC_CUVAHLG_TO_SDR) {
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if (vd_path == VD1_PATH)
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cuva_hdr_update(VD1_HDR, CUVAHLG_SDR, vpp_index);
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else if (vd_path == VD2_PATH)
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if (vd_path == VD1_PATH) {
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if (silce_mode == VD1_1SLICE) {
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cuva_hdr_update(VD1_HDR, CUVAHLG_SDR, vpp_index);
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} else if (silce_mode == VD1_2SLICE) {
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cuva_hdr_update(VD1_HDR, CUVAHLG_SDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE1, CUVAHLG_SDR, vpp_index);
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} else if (silce_mode == VD1_4SLICE) {
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cuva_hdr_update(VD1_HDR, CUVAHLG_SDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE1, CUVAHLG_SDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE2, CUVAHLG_SDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE3, CUVAHLG_SDR, vpp_index);
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}
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} else if (vd_path == VD2_PATH) {
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cuva_hdr_update(VD2_HDR, CUVAHLG_SDR, vpp_index);
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else if (vd_path == VD3_PATH)
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} else if (vd_path == VD3_PATH) {
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cuva_hdr_update(VD3_HDR, CUVAHLG_SDR, vpp_index);
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}
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} else if (proc_mode == PROC_CUVAHLG_TO_HLG) {
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if (vd_path == VD1_PATH)
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cuva_hdr_update(VD1_HDR, CUVAHLG_HLG, vpp_index);
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else if (vd_path == VD2_PATH)
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if (vd_path == VD1_PATH) {
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if (silce_mode == VD1_1SLICE) {
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cuva_hdr_update(VD1_HDR, CUVAHLG_HLG, vpp_index);
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} else if (silce_mode == VD1_2SLICE) {
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cuva_hdr_update(VD1_HDR, CUVAHLG_HLG, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE1, CUVAHLG_HLG, vpp_index);
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} else if (silce_mode == VD1_4SLICE) {
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cuva_hdr_update(VD1_HDR, CUVAHLG_HLG, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE1, CUVAHLG_HLG, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE2, CUVAHLG_HLG, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE3, CUVAHLG_HLG, vpp_index);
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}
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} else if (vd_path == VD2_PATH) {
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cuva_hdr_update(VD2_HDR, CUVAHLG_HLG, vpp_index);
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else if (vd_path == VD3_PATH)
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} else if (vd_path == VD3_PATH) {
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cuva_hdr_update(VD3_HDR, CUVAHLG_HLG, vpp_index);
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}
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} else if (proc_mode == PROC_CUVAHLG_TO_HDR) {
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if (vd_path == VD1_PATH)
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cuva_hdr_update(VD1_HDR, CUVAHLG_HDR, vpp_index);
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else if (vd_path == VD2_PATH)
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if (vd_path == VD1_PATH) {
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if (silce_mode == VD1_1SLICE) {
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cuva_hdr_update(VD1_HDR, CUVAHLG_HDR, vpp_index);
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} else if (silce_mode == VD1_2SLICE) {
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cuva_hdr_update(VD1_HDR, CUVAHLG_HDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE1, CUVAHLG_HDR, vpp_index);
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} else if (silce_mode == VD1_4SLICE) {
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cuva_hdr_update(VD1_HDR, CUVAHLG_HDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE1, CUVAHLG_HDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE2, CUVAHLG_HDR, vpp_index);
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cuva_hdr_update(S5_VD1_SLICE3, CUVAHLG_HDR, vpp_index);
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}
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} else if (vd_path == VD2_PATH) {
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cuva_hdr_update(VD2_HDR, CUVAHLG_HDR, vpp_index);
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else if (vd_path == VD3_PATH)
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} else if (vd_path == VD3_PATH) {
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cuva_hdr_update(VD3_HDR, CUVAHLG_HDR, vpp_index);
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}
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}
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}
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}
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