mirror of
https://github.com/hardkernel/kernel_common_drivers.git
synced 2026-06-25 12:03:48 +09:00
hdmitx: fix hdmitx startup ioremap warning [1/1]
PD#SWPL-189311 Problem: there is ioremap warning during hdmitx driver startup process Solution: removed all-0 address segment ioremap operation Verify: SC2 Test: DRM-TX-5 Change-Id: Iec472bac2c4373e7c77bf618c72e013d1018b023 Signed-off-by: ruofei.zhao <ruofei.zhao@amlogic.com>
This commit is contained in:
committed by
Wanwei Jiang
parent
5c4980155c
commit
dd4188cef2
@@ -1611,28 +1611,24 @@
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/* refer to hdmi_tx_module.h */
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ic_type = <15>;
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hdmi_rext = <1300>; /* HDMI Rext resistor uses 1.3k ohm, not 1.5k */
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reg = <0x00000000 0x000>, /* reserved */
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<0xff000000 0x40000>,
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<0x00000000 0x000>, /* reserved */
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<0xfe308000 0x8000>,
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reg = <0xff000000 0x40000>,
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<0xfe300000 0x8000>,
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<0xfe308000 0x8000>,
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<0xfe032000 0x100>,
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<0xfe008000 0x400>,
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<0xfe00c000 0x800>,
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<0xfe002000 0x400>,
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<0xfe010000 0x100>,
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<0xfe000000 0x2000>;
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reg-names = "cbus",
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"vpu",
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"hiu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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reg-names = "vpu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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vend_data: vend_data{ /* Should modified by Customer */
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vendor_name = "Amlogic"; /* Max Chars: 8 */
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@@ -1644,28 +1644,24 @@
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/* refer to hdmi_tx_module.h */
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ic_type = <15>;
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hdmi_rext = <1300>; /* HDMI Rext resistor uses 1.3k ohm, not 1.5k */
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reg = <0x00000000 0x000>, /* reserved */
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<0xff000000 0x40000>,
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<0x00000000 0x000>, /* reserved */
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<0xfe308000 0x8000>,
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reg = <0xff000000 0x40000>,
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<0xfe300000 0x8000>,
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<0xfe308000 0x8000>,
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<0xfe032000 0x100>,
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<0xfe008000 0x400>,
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<0xfe00c000 0x800>,
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<0xfe002000 0x400>,
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<0xfe010000 0x100>,
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<0xfe000000 0x2000>;
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reg-names = "cbus",
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"vpu",
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"hiu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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reg-names = "vpu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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vend_data: vend_data{ /* Should modified by Customer */
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vendor_name = "Amlogic"; /* Max Chars: 8 */
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@@ -1687,28 +1687,24 @@
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interrupt-names = "hdmitx_hpd", "viu1_vsync";
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/* refer to hdmi_tx_module.h */
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ic_type = <15>;
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reg = <0x00000000 0x000>, /* reserved */
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<0xff000000 0x40000>,
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<0x00000000 0x000>, /* reserved */
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<0xfe308000 0x8000>,
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reg = <0xff000000 0x40000>,
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<0xfe300000 0x8000>,
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<0xfe308000 0x8000>,
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<0xfe032000 0x100>,
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<0xfe008000 0x400>,
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<0xfe00c000 0x800>,
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<0xfe002000 0x400>,
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<0xfe010000 0x100>,
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<0xfe000000 0x2000>;
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reg-names = "cbus",
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"vpu",
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"hiu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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reg-names = "vpu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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vend_data: vend_data{ /* Should modified by Customer */
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vendor_name = "Amlogic"; /* Max Chars: 8 */
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@@ -1613,29 +1613,24 @@
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/* refer to hdmi_tx_module.h */
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ic_type = <15>;
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hdmi_rext = <1300>; /* HDMI Rext resistor uses 1.3k ohm, not 1.5k */
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reg = <0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0xff000000 0x0 0x40000>,
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0xfe308000 0x0 0x8000>,
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reg = <0x0 0xff000000 0x0 0x40000>,
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<0x0 0xfe300000 0x0 0x8000>,
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<0x0 0xfe308000 0x0 0x8000>,
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<0x0 0xfe032000 0x0 0x100>,
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<0x0 0xfe008000 0x0 0x400>,
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<0x0 0xfe00c000 0x0 0x800>,
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<0x0 0xfe002000 0x0 0x400>,
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<0x0 0xfe010000 0x0 0x100>,
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<0x0 0xfe000000 0x0 0x2000>;
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reg-names = "cbus",
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"vpu",
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"hiu",
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"hdmitx_dwc",
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"hdmitx_top",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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reg-names = "vpu",
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"hdmitx_dwc",
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"hdmitx_top",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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vend_data: vend_data{ /* Should modified by Customer */
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vendor_name = "Amlogic"; /* Max Chars: 8 */
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product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
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@@ -1447,29 +1447,24 @@
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/* refer to hdmi_tx_module.h */
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ic_type = <15>;
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hdmi_rext = <1300>; /* HDMI Rext resistor uses 1.3k ohm, not 1.5k */
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reg = <0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0xff000000 0x0 0x40000>,
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0xfe308000 0x0 0x8000>,
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reg = <0x0 0xff000000 0x0 0x40000>,
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<0x0 0xfe300000 0x0 0x8000>,
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<0x0 0xfe308000 0x0 0x8000>,
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<0x0 0xfe032000 0x0 0x100>,
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<0x0 0xfe008000 0x0 0x400>,
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<0x0 0xfe00c000 0x0 0x800>,
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<0x0 0xfe002000 0x0 0x400>,
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<0x0 0xfe010000 0x0 0x100>,
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<0x0 0xfe000000 0x0 0x2000>;
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reg-names = "cbus",
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"vpu",
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"hiu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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reg-names = "vpu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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vend_data: vend_data{ /* Should modified by Customer */
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vendor_name = "Amlogic"; /* Max Chars: 8 */
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product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
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@@ -1690,29 +1690,24 @@
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interrupt-names = "hdmitx_hpd", "viu1_vsync";
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/* refer to hdmi_tx_module.h */
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ic_type = <15>;
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reg = <0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0xff000000 0x0 0x40000>,
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0xfe308000 0x0 0x8000>,
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reg = <0x0 0xff000000 0x0 0x40000>,
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<0x0 0xfe300000 0x0 0x8000>,
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<0x0 0xfe308000 0x0 0x8000>,
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<0x0 0xfe032000 0x0 0x100>,
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<0x0 0xfe008000 0x0 0x400>,
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<0x0 0xfe00c000 0x0 0x800>,
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<0x0 0xfe002000 0x0 0x400>,
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<0x0 0xfe010000 0x0 0x100>,
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<0x0 0xfe000000 0x0 0x2000>;
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reg-names = "cbus",
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"vpu",
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"hiu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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reg-names = "vpu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl";
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vend_data: vend_data{ /* Should modified by Customer */
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vendor_name = "Amlogic"; /* Max Chars: 8 */
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product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
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@@ -1099,32 +1099,22 @@
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* 10:G12A 11:G12B
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*/
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ic_type = <10>;
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reg = <0x0 0xffd00000 0x0 0x100000>,
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<0x0 0xff900000 0x0 0x40000>,
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reg = <0x0 0xff900000 0x0 0x40000>,
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<0x0 0xff600000 0x0 0x8000>,
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<0x0 0xff608000 0x0 0x4000>,
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<0x0 0xffe01000 0x0 0x100>,
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<0x0 0xff63c000 0x0 0x2000>,
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<0x0 0xff608000 0x0 0x4000>, //TOP
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<0x0 0xff600000 0x0 0x8000>, //DWC reverse
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<0x0 0xffe01000 0x0 0x100>, //ESM
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0xffd00000 0x0 0x100000>,
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<0x0 0xffd00000 0x0 0x1100>,
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0x00000000 0x0 0x0000>,/* reserved */
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<0x0 0x00000000 0x0 0x0000>, /* reserved */
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<0x0 0xff634400 0x0 0x2000>,
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<0x0 0xff800000 0x0 0x100000>;
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reg-names = "cbus",
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"vpu",
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"hiu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl",
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"padctrl",
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reg-names = "vpu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"hiu",
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"cbus",
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"resetctrl",
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"periphs",
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"aobus";
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vend_data: vend_data{ /* Should modified by Customer */
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@@ -1175,32 +1175,22 @@
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* 10:G12A 11:G12B
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*/
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ic_type = <11>;
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reg = <0x0 0xffd00000 0x0 0x100000>,
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<0x0 0xff900000 0x0 0x40000>,
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reg = <0x0 0xff900000 0x0 0x40000>,
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<0x0 0xff600000 0x0 0x8000>,
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<0x0 0xff608000 0x0 0x4000>,
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<0x0 0xffe01000 0x0 0x100>,
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<0x0 0xff63c000 0x0 0x2000>,
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<0x0 0xff608000 0x0 0x4000>, //TOP
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<0x0 0xff600000 0x0 0x8000>, //DWC reverse
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<0x0 0xffe01000 0x0 0x100>, //ESM
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0xffd00000 0x0 0x100000>,
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<0x0 0xffd00000 0x0 0x1100>,
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0x00000000 0x0 0x0000>,/* reserved */
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<0x0 0x00000000 0x0 0x0000>, /* reserved */
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<0x0 0xff634400 0x0 0x2000>,
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<0x0 0xff800000 0x0 0x100000>;
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reg-names = "cbus",
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"vpu",
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"hiu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl",
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"padctrl",
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reg-names = "vpu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"hiu",
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"cbus",
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"resetctrl",
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"periphs",
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"aobus";
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vend_data: vend_data{ /* Should modified by Customer */
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@@ -1378,32 +1378,22 @@
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* 10:G12A 11:G12B 12:SM1
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*/
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ic_type = <12>;
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reg = <0x0 0xffd00000 0x0 0x100000>,
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<0x0 0xff900000 0x0 0x40000>,
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reg = <0x0 0xff900000 0x0 0x40000>,
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<0x0 0xff600000 0x0 0x8000>,
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<0x0 0xff608000 0x0 0x4000>,
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<0x0 0xffe01000 0x0 0x100>,
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<0x0 0xff63c000 0x0 0x2000>,
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<0x0 0xff608000 0x0 0x4000>, //TOP
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<0x0 0xff600000 0x0 0x8000>, //DWC reverse
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<0x0 0xffe01000 0x0 0x100>, //ESM
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0xffd00000 0x0 0x100000>,
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<0x0 0xffd00000 0x0 0x1100>,
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<0x0 0x00000000 0x0 0x000>, /* reserved */
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<0x0 0x00000000 0x0 0x0000>,/* reserved */
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<0x0 0x00000000 0x0 0x0000>, /* reserved */
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<0x0 0xff634400 0x0 0x2000>,
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<0x0 0xff800000 0x0 0x100000>;
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reg-names = "cbus",
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"vpu",
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"hiu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"anactrl",
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"pwrctrl",
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"resetctrl",
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"sysctrl",
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"clkctrl",
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"padctrl",
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reg-names = "vpu",
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"hdmitxdwc",
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"hdmitxtop",
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"esm",
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"hiu",
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"cbus",
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"resetctrl",
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"periphs",
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"aobus";
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vend_data: vend_data{ /* Should modified by Customer */
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@@ -33,16 +33,11 @@ static inline unsigned int get_msr_cts(void);
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static int dump_regs_show(struct seq_file *s, void *p)
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{
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int i;
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struct hdmitx_dev *hdev = get_hdmitx_device();
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int chip_id = hdev->tx_hw.chip_data->chip_type;
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if (reg_maps[HHI_REG_IDX].phy_addr) {
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seq_puts(s, "\n--------HHI registers--------\n");
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for (i = 0; i < 0x80; i++)
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PR_BUS(HHI_REG_ADDR(i));
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for (i = 0x80; i < 0x100; i++)
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PR_BUS(HHI_REG_ADDR(i));
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}
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if (reg_maps[VCBUS_REG_IDX].phy_addr) {
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if (reg_maps[VPU_REG_IDX].phy_addr) {
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seq_puts(s, "\n--------ENCP registers--------\n");
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for (i = 0x1b00; i < 0x1b80; i++)
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PR_BUS(VCBUS_REG_ADDR(i));
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@@ -58,36 +53,43 @@ static int dump_regs_show(struct seq_file *s, void *p)
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PR_BUS(VCBUS_REG_ADDR(i));
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}
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if (reg_maps[CBUS_REG_IDX].phy_addr) {
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seq_puts(s, "\n--------CBUS registers--------\n");
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PR_BUS(P_AIU_HDMI_CLK_DATA_CTRL);
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PR_BUS(P_ISA_DEBUG_REG0);
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}
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/* HHI and CBUS only exist on chips before SC2 */
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if (chip_id < MESON_CPU_ID_SC2) {
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if (reg_maps[HHI_REG_IDX].phy_addr) {
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seq_puts(s, "\n--------HHI registers--------\n");
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for (i = 0; i < 0x80; i++)
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PR_BUS(HHI_REG_ADDR(i));
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for (i = 0x80; i < 0x100; i++)
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PR_BUS(HHI_REG_ADDR(i));
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}
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if (reg_maps[CBUS_REG_IDX].phy_addr) {
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seq_puts(s, "\n--------CBUS registers--------\n");
|
||||
PR_BUS(P_AIU_HDMI_CLK_DATA_CTRL);
|
||||
PR_BUS(P_ISA_DEBUG_REG0);
|
||||
}
|
||||
|
||||
if (reg_maps[ANACTRL_REG_IDX].phy_addr) {
|
||||
seq_puts(s, "\n--------ANACTRL registers--------\n");
|
||||
for (i = 0; i < 0xff; i++)
|
||||
PR_BUS(ANACTRL_REG_ADDR(i));
|
||||
} else {
|
||||
if (reg_maps[ANACTRL_REG_IDX].phy_addr) {
|
||||
seq_puts(s, "\n--------ANACTRL registers--------\n");
|
||||
for (i = 0; i < 0xff; i++)
|
||||
PR_BUS(ANACTRL_REG_ADDR(i));
|
||||
}
|
||||
if (reg_maps[PWRCTRL_REG_IDX].phy_addr) {
|
||||
seq_puts(s, "\n--------PWRCTRL registers--------\n");
|
||||
for (i = 0; i < 0xff; i++)
|
||||
PR_BUS(PWRCTRL_REG_ADDR(i));
|
||||
}
|
||||
if (reg_maps[SYSCTRL_REG_IDX].phy_addr) {
|
||||
seq_puts(s, "\n--------SYSCTRL registers--------\n");
|
||||
for (i = 0; i < 0xff; i++)
|
||||
PR_BUS(SYSCTRL_REG_ADDR(i));
|
||||
}
|
||||
if (reg_maps[CLKCTRL_REG_IDX].phy_addr) {
|
||||
seq_puts(s, "\n--------CLKCTRL registers--------\n");
|
||||
for (i = 0; i < 0xff; i++)
|
||||
PR_BUS(CLKCTRL_REG_ADDR(i));
|
||||
}
|
||||
}
|
||||
|
||||
if (reg_maps[PWRCTRL_REG_IDX].phy_addr) {
|
||||
seq_puts(s, "\n--------PWRCTRL registers--------\n");
|
||||
for (i = 0; i < 0xff; i++)
|
||||
PR_BUS(PWRCTRL_REG_ADDR(i));
|
||||
}
|
||||
|
||||
if (reg_maps[SYSCTRL_REG_IDX].phy_addr) {
|
||||
seq_puts(s, "\n--------SYSCTRL registers--------\n");
|
||||
for (i = 0; i < 0xff; i++)
|
||||
PR_BUS(SYSCTRL_REG_ADDR(i));
|
||||
}
|
||||
|
||||
if (reg_maps[CLKCTRL_REG_IDX].phy_addr) {
|
||||
seq_puts(s, "\n--------CLKCTRL registers--------\n");
|
||||
for (i = 0; i < 0xff; i++)
|
||||
PR_BUS(CLKCTRL_REG_ADDR(i));
|
||||
}
|
||||
|
||||
seq_puts(s, "\n");
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -32,7 +32,7 @@ int hdmitx_init_reg_map(struct platform_device *pdev)
|
||||
struct resource res;
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
|
||||
for (i = CBUS_REG_IDX; i < REG_IDX_END; i++) {
|
||||
for (i = VPU_REG_IDX; i < REG_IDX_END; i++) {
|
||||
if (of_address_to_resource(np, i, &res)) {
|
||||
HDMITX_INFO("not get regbase index %d\n", i);
|
||||
return 0;
|
||||
|
||||
@@ -33,23 +33,34 @@ struct reg_map {
|
||||
};
|
||||
|
||||
enum map_addr_idx_e {
|
||||
CBUS_REG_IDX = 0,
|
||||
VCBUS_REG_IDX,
|
||||
HHI_REG_IDX,
|
||||
HDMITX_REG_IDX, //DWC
|
||||
HDMITX_SEC_REG_IDX, //TOP
|
||||
ELP_ESM_REG_IDX,
|
||||
/* new added in SC2 */
|
||||
ANACTRL_REG_IDX,
|
||||
PWRCTRL_REG_IDX,
|
||||
RESETCTRL_REG_IDX,
|
||||
SYSCTRL_REG_IDX,
|
||||
CLKCTRL_REG_IDX,
|
||||
PADCTRL_REG_IDX,
|
||||
/* g12a add */
|
||||
PERIPHS_REG_IDX,
|
||||
AOBUS_REG_IDX,
|
||||
REG_IDX_END
|
||||
/* VPU */
|
||||
VPU_REG_IDX = 0,
|
||||
/* HDMITX_DWC */
|
||||
HDMITX_SEC_REG_IDX = 1,
|
||||
/* HDMITX_TOP */
|
||||
HDMITX_REG_IDX = 2,
|
||||
/* ESM */
|
||||
ELP_ESM_REG_IDX = 3,
|
||||
/* ANACTRL for SC2 and later SOCs */
|
||||
ANACTRL_REG_IDX = 4,
|
||||
/* HHICTRL for G12A and previous SOCs */
|
||||
HHI_REG_IDX = 4,
|
||||
/* PWRCTRL for SC2 and later SOCs */
|
||||
PWRCTRL_REG_IDX = 5,
|
||||
/* CBUS for G12A and previous SOCs */
|
||||
CBUS_REG_IDX = 5,
|
||||
/* RESETCTRL */
|
||||
RESETCTRL_REG_IDX = 6,
|
||||
/* SYSCTRL for SC2 and later SOCs */
|
||||
SYSCTRL_REG_IDX = 7,
|
||||
/* PERIPHS for G12A and previous SOCs */
|
||||
PERIPHS_REG_IDX = 7,
|
||||
/* CLKCTRL for SC2 and later SOCs */
|
||||
CLKCTRL_REG_IDX = 8,
|
||||
/* AOBUS for G12A and previous SOCs */
|
||||
AOBUS_REG_IDX = 8,
|
||||
PADCTRL_REG_IDX = 9,
|
||||
REG_IDX_END = 10,
|
||||
};
|
||||
|
||||
#define BASE_REG_OFFSET 24
|
||||
@@ -57,13 +68,15 @@ enum map_addr_idx_e {
|
||||
#define CBUS_REG_ADDR(reg) \
|
||||
((CBUS_REG_IDX << BASE_REG_OFFSET) + ((reg) << 2))
|
||||
#define VCBUS_REG_ADDR(reg) \
|
||||
((VCBUS_REG_IDX << BASE_REG_OFFSET) + ((reg) << 2))
|
||||
((VPU_REG_IDX << BASE_REG_OFFSET) + ((reg) << 2))
|
||||
#define HHI_REG_ADDR(reg) \
|
||||
((HHI_REG_IDX << BASE_REG_OFFSET) + ((reg) << 2))
|
||||
/* HDMITX_DWC */
|
||||
#define HDMITX_SEC_REG_ADDR(reg) \
|
||||
((HDMITX_SEC_REG_IDX << BASE_REG_OFFSET) + (reg))/*DWC*/
|
||||
((HDMITX_SEC_REG_IDX << BASE_REG_OFFSET) + (reg))
|
||||
/* HDMITX_TOP */
|
||||
#define HDMITX_REG_ADDR(reg) \
|
||||
((HDMITX_REG_IDX << BASE_REG_OFFSET) + (reg))/*TOP*/
|
||||
((HDMITX_REG_IDX << BASE_REG_OFFSET) + (reg))
|
||||
#define ELP_ESM_REG_ADDR(reg) \
|
||||
((ELP_ESM_REG_IDX << BASE_REG_OFFSET) + ((reg) << 2))
|
||||
#define ANACTRL_REG_ADDR(reg) \
|
||||
|
||||
Reference in New Issue
Block a user