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amvecm: patch to trunk about sub gamma wb [1/1]

Browse Source 
PD#SWPL-136950

Problem:
trunk lacks the process code

Solution:
add the process code

Verify:
t3

Change-Id: Ibd934ae326857e3365f7ee6d375334ce6d33643e
Signed-off-by: qirong.li <qirong.li@amlogic.com>
This commit is contained in:
qirong.li
2023-09-14 09:32:44 +00:00
committed by gerrit autosubmit
parent 72baca2043
commit e4cd46dca3
5 changed files with 363 additions and 80 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/media/enhancement/amvecm/amve.c
+61 -28
View File
@@ -827,6 +827,25 @@ void amve_write_gamma_table(u16 *data, u32 rgb_mask)
spin_unlock_irqrestore(&vpp_lcd_gamma_lock, flags);
}
void amve_write_gamma_table_sub(u16 *data, u32 rgb_mask)
{
if (is_meson_t7_cpu()) {
lcd_gamma_api(gamma_index_sub,
gamma_data_r, gamma_data_g, gamma_data_b, 0, 1);
if (rgb_mask == H_SEL_R)
memcpy(gamma_data_r, data, sizeof(u16) * 256);
else if (rgb_mask == H_SEL_G)
memcpy(gamma_data_g, data, sizeof(u16) * 256);
else if (rgb_mask == H_SEL_B)
memcpy(gamma_data_b, data, sizeof(u16) * 256);
lcd_gamma_api(gamma_index_sub,
gamma_data_r, gamma_data_g, gamma_data_b, 0, 0);
}
}
#endif
#define COEFF_NORM(a) ((int)((((a) * 2048.0) + 1) / 2))
@@ -867,28 +886,6 @@ static int matrix_yuv_bypass_coef[MATRIX_3x3_COEF_SIZE] = {
MTX_ENABLE
};
void vpp_set_rgb_ogo_sub(struct tcon_rgb_ogo_s *p)
{
/*for t7 vpp1 go*/
if (is_meson_t7_cpu()) {
WRITE_VPP_REG(VPP1_GAINOFF_CTRL0,
((p->en << 31) & 0x80000000) |
((p->r_gain << 16) & 0x07ff0000) |
((p->g_gain << 0) & 0x000007ff));
WRITE_VPP_REG(VPP1_GAINOFF_CTRL1,
((p->b_gain << 16) & 0x07ff0000) |
((p->r_post_offset << 0) & 0x00001fff));
WRITE_VPP_REG(VPP1_GAINOFF_CTRL2,
((p->g_post_offset << 16) & 0x1fff0000) |
((p->b_post_offset << 0) & 0x00001fff));
WRITE_VPP_REG(VPP1_GAINOFF_CTRL3,
((p->r_pre_offset << 16) & 0x1fff0000) |
((p->g_pre_offset << 0) & 0x00001fff));
WRITE_VPP_REG(VPP1_GAINOFF_CTRL4,
((p->b_pre_offset << 0) & 0x00001fff));
}
}
void vpp_set_rgb_ogo(struct tcon_rgb_ogo_s *p)
{
int m[24];
@@ -1076,6 +1073,28 @@ void vpp_set_rgb_ogo(struct tcon_rgb_ogo_s *p)
}
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
void vpp_set_rgb_ogo_sub(struct tcon_rgb_ogo_s *p)
{
/*for t7 vpp1 go*/
if (is_meson_t7_cpu()) {
WRITE_VPP_REG(VPP1_GAINOFF_CTRL0,
((p->en << 31) & 0x80000000) |
((p->r_gain << 16) & 0x07ff0000) |
((p->g_gain << 0) & 0x000007ff));
WRITE_VPP_REG(VPP1_GAINOFF_CTRL1,
((p->b_gain << 16) & 0x07ff0000) |
((p->r_post_offset << 0) & 0x00001fff));
WRITE_VPP_REG(VPP1_GAINOFF_CTRL2,
((p->g_post_offset << 16) & 0x1fff0000) |
((p->b_post_offset << 0) & 0x00001fff));
WRITE_VPP_REG(VPP1_GAINOFF_CTRL3,
((p->r_pre_offset << 16) & 0x1fff0000) |
((p->g_pre_offset << 0) & 0x00001fff));
WRITE_VPP_REG(VPP1_GAINOFF_CTRL4,
((p->b_pre_offset << 0) & 0x00001fff));
}
}
void ve_enable_dnlp(void)
{
unsigned int reg_ctrl = SRSHARP1_DNLP_EN;
@@ -1405,13 +1424,13 @@ void ve_lcd_gamma_process(void)
if (is_meson_t7_cpu()) {
if (vecm_latch_flag2 & FLAG_GAMMA_TABLE_EN_SUB) {
vecm_latch_flag2 &= ~FLAG_GAMMA_TABLE_EN_SUB;
vpp_enable_lcd_gamma_table(gamma_index_sub, 0);
vpp_enable_lcd_gamma_table(gamma_index_sub, 1);
pr_amve_dbg("\n[amve..] set enable_lcd_gamma_sub OK!!!\n");
}
if (vecm_latch_flag2 & FLAG_GAMMA_TABLE_DIS_SUB) {
vecm_latch_flag2 &= ~FLAG_GAMMA_TABLE_DIS_SUB;
vpp_disable_lcd_gamma_table(gamma_index_sub, 0);
vpp_disable_lcd_gamma_table(gamma_index_sub, 1);
pr_amve_dbg("\n[amve..] set disable_lcd_gamma_sub OK!!!\n");
}
@@ -1548,7 +1567,7 @@ static void video_set_rgb_ogo(void)
video_gamma_table_b_adj.data[i] = b;
}
}
#endif
void ve_ogo_param_update_sub(void)
{
@@ -1587,6 +1606,7 @@ void ve_ogo_param_update_sub(void)
vecm_latch_flag |= FLAG_RGB_OGO;
}
#endif
void ve_ogo_param_update(void)
{
@@ -2532,18 +2552,22 @@ void lut3d_update(unsigned int p3dlut_in[][3])
{
int d0, d1, d2, index0;
int i;
int offset = 0;
if (p3dlut_in) {
if (is_meson_t7_cpu())
offset = 2;
for (d0 = 0; d0 < 17; d0++) {
for (d1 = 0; d1 < 17; d1++) {
for (d2 = 0; d2 < 17; d2++) {
index0 = d0 * 289 + d1 * 17 + d2;
plut3d[index0 * 3 + 0] =
p3dlut_in[index0][0] & 0xfff;
(p3dlut_in[index0][0] << offset) & 0xfff;
plut3d[index0 * 3 + 1] =
p3dlut_in[index0][1] & 0xfff;
(p3dlut_in[index0][1] << offset) & 0xfff;
plut3d[index0 * 3 + 2] =
p3dlut_in[index0][2] & 0xfff;
(p3dlut_in[index0][2] << offset) & 0xfff;
}
}
}
@@ -2921,6 +2945,15 @@ void amvecm_wb_enable(int enable)
}
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
void amvecm_wb_enable_sub(int enable)
{
if (enable)
WRITE_VPP_REG_BITS(0x59a1, 1, 31, 1);
else
WRITE_VPP_REG_BITS(0x59a1, 0, 31, 1);
}
/*frequence meter init*/
void amve_fmeter_init(int enable)
{
drivers/media/enhancement/amvecm/amve.h
+3
View File
@@ -98,6 +98,7 @@ extern struct tcon_gamma_table_s video_gamma_table_b_adj;
extern struct tcon_rgb_ogo_s video_rgb_ogo;
extern struct gm_tbl_s gt;
extern unsigned int gamma_index;
extern unsigned int gamma_index_sub;
extern unsigned int gm_par_idx;
extern unsigned int *plut3d;
extern struct tcon_gamma_table_s video_gamma_table_r_sub;
@@ -140,6 +141,7 @@ void vpp_enable_lcd_gamma_table(int viu_sel, int rdma_write);
void vpp_disable_lcd_gamma_table(int viu_sel, int rdma_write);
void vpp_set_lcd_gamma_table(u16 *data, u32 rgb_mask, int viu_sel);
void amve_write_gamma_table(u16 *data, u32 rgb_mask);
void amve_write_gamma_table_sub(u16 *data, u32 rgb_mask);
void vpp_set_rgb_ogo_sub(struct tcon_rgb_ogo_s *p);
void vpp_set_rgb_ogo(struct tcon_rgb_ogo_s *p);
void vpp_phase_lock_on_vs(unsigned int cycle,
@@ -227,6 +229,7 @@ void dump_plut3d_reg_table(void);
void amvecm_gamma_init(bool en);
void set_gamma_regs(int en, int sel);
void amvecm_wb_enable(int enable);
void amvecm_wb_enable_sub(int enable);
int vpp_pq_ctrl_config(struct pq_ctrl_s pq_cfg, enum wr_md_e md);
unsigned int skip_pq_ctrl_load(struct am_reg_s *p);
void set_pre_gamma_reg(struct pre_gamma_table_s *pre_gma_tb);
drivers/media/enhancement/amvecm/amvecm.c
+287 -40
View File
@@ -375,6 +375,10 @@ unsigned int hdr_output_mode;
module_param(hdr_output_mode, uint, 0664);
MODULE_PARM_DESC(hdr_output_mode, "\n hdr_output_mode\n");
unsigned int data_path; /* 0:main;1:sub */
module_param(data_path, int, 0664);
MODULE_PARM_DESC(data_path, "\n data_path\n");
unsigned int pq_user_value;
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
enum hdr_type_e hdr_source_type = HDRTYPE_NONE;
@@ -3206,19 +3210,21 @@ static long amvecm_ioctl(struct file *file,
ret = -EFAULT;
break;
case AMVECM_IOC_S_RGB_OGO_SUB:
pr_amvecm_dbg("AMVECM_IOC_S_RGB_OGO_SUB, wb_en=%d\n", wb_en);
if (!wb_en)
return -EINVAL;
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
if (copy_from_user(&video_rgb_ogo_sub,
(void __user *)arg,
sizeof(struct tcon_rgb_ogo_s)))
ret = -EFAULT;
else
ve_ogo_param_update_sub();
#endif
break;
case AMVECM_IOC_G_RGB_OGO_SUB:
pr_amvecm_dbg("AMVECM_IOC_G_RGB_OGO_SUB, wb_en=%d\n", wb_en);
if (!wb_en)
@@ -5446,6 +5452,7 @@ static ssize_t amvecm_gamma_show(struct class *cls,
pr_info("Usage:");
pr_info(" echo sgr|sgg|sgb xxx...xx > /sys/class/amvecm/gamma\n");
pr_info(" echo sgr_sub|sgg_sub|sgb_sub xxx...xx > /sys/class/amvecm/gamma\n");
pr_info("Notes:\n");
pr_info(" if the string xxx......xx is less than 256*3,");
pr_info(" then the remaining will be set value 0\n");
@@ -5453,6 +5460,7 @@ static ssize_t amvecm_gamma_show(struct class *cls,
pr_info(" then the remaining will be ignored\n");
pr_info("Usage:");
pr_info(" echo ggr|ggg|ggb xxx > /sys/class/amvecm/gamma\n");
pr_info(" echo ggr_sub|ggg_sub|ggb_sub xxx > /sys/class/amvecm/gamma\n");
pr_info("Notes:\n");
pr_info(" read all as point......xxx is 'all'.\n");
pr_info(" read all as strings......xxx is 'all_str'.\n");
@@ -5477,6 +5485,7 @@ static ssize_t amvecm_gamma_store(struct class *cls,
char *stemp = NULL;
unsigned int len;
unsigned int crc_data;
unsigned int rgb_mask;
stemp = kmalloc(600, GFP_KERNEL);
if (!stemp)
@@ -5555,20 +5564,31 @@ static ssize_t amvecm_gamma_store(struct class *cls,
switch (parm[0][2]) {
case 'r':
amve_write_gamma_table(gamma_r, H_SEL_R);
rgb_mask = H_SEL_R;
break;
case 'g':
amve_write_gamma_table(gamma_r, H_SEL_G);
rgb_mask = H_SEL_G;
break;
case 'b':
amve_write_gamma_table(gamma_r, H_SEL_B);
rgb_mask = H_SEL_B;
break;
default:
break;
}
if (!data_path)
amve_write_gamma_table(gamma_r, rgb_mask);
else
amve_write_gamma_table_sub(gamma_r, rgb_mask);
} else if (!strcmp(parm[0], "ggr")) {
if (!data_path)
vpp_get_lcd_gamma_table(H_SEL_R);
else
vpp_get_lcd_gamma_table_sub();
vpp_get_lcd_gamma_table(H_SEL_R);
if (!strcmp(parm[1], "all")) {
for (i = 0; i < 256; i++)
@@ -5593,7 +5613,11 @@ static ssize_t amvecm_gamma_store(struct class *cls,
i, gamma_data_r[i]);
}
} else if (!strcmp(parm[0], "ggg")) {
vpp_get_lcd_gamma_table(H_SEL_G);
if (!data_path)
vpp_get_lcd_gamma_table(H_SEL_G);
else
vpp_get_lcd_gamma_table_sub();
if (!strcmp(parm[1], "all")) {
for (i = 0; i < 256; i++)
pr_info("gamma_g[%d] = %x\n",
@@ -5618,7 +5642,11 @@ static ssize_t amvecm_gamma_store(struct class *cls,
}
} else if (!strcmp(parm[0], "ggb")) {
vpp_get_lcd_gamma_table(H_SEL_B);
if (!data_path)
vpp_get_lcd_gamma_table(H_SEL_B);
else
vpp_get_lcd_gamma_table_sub();
if (!strcmp(parm[1], "all")) {
for (i = 0; i < 256; i++)
pr_info("gamma_b[%d] = %x\n",
@@ -6032,9 +6060,24 @@ static ssize_t set_gamma_pattern_store(struct class *cls,
}
if (!strcmp(parm[0], "disable")) {
vecm_latch_flag |= FLAG_GAMMA_TABLE_R;
vecm_latch_flag |= FLAG_GAMMA_TABLE_G;
vecm_latch_flag |= FLAG_GAMMA_TABLE_B;
if (!data_path) {
vecm_latch_flag |= FLAG_GAMMA_TABLE_R;
vecm_latch_flag |= FLAG_GAMMA_TABLE_G;
vecm_latch_flag |= FLAG_GAMMA_TABLE_B;
} else {
vecm_latch_flag |= FLAG_GAMMA_TABLE_R_SUB;
vecm_latch_flag |= FLAG_GAMMA_TABLE_G_SUB;
vecm_latch_flag |= FLAG_GAMMA_TABLE_B_SUB;
}
kfree(buf_orig);
return count;
}
if (!strcmp(parm[0], "disable_sub")) {
vecm_latch_flag |= FLAG_GAMMA_TABLE_R_SUB;
vecm_latch_flag |= FLAG_GAMMA_TABLE_G_SUB;
vecm_latch_flag |= FLAG_GAMMA_TABLE_B_SUB;
kfree(buf_orig);
return count;
}
@@ -6093,7 +6136,10 @@ static ssize_t set_gamma_pattern_store(struct class *cls,
}
if (cpu_after_eq_t7()) {
lcd_gamma_api(gamma_index, r_val, g_val, b_val, WR_VCB, WR_MOD);
if (!data_path)
lcd_gamma_api(gamma_index, r_val, g_val, b_val, WR_VCB, WR_MOD);
else
lcd_gamma_api(gamma_index_sub, r_val, g_val, b_val, WR_VCB, WR_MOD);
} else {
amve_write_gamma_table(r_val, H_SEL_R);
amve_write_gamma_table(g_val, H_SEL_G);
@@ -6148,6 +6194,51 @@ void white_balance_adjust(int sel, int value)
ve_ogo_param_update();
}
void white_balance_adjust_sub(int sel, int value)
{
switch (sel) {
/*0: en*/
/*1: pre r 2: pre g 3: pre b*/
/*4: gain r 5: gain g 6: gain b*/
/*7: post r 8: post g 9: post b*/
case 0:
video_rgb_ogo_sub.en = value;
break;
case 1:
video_rgb_ogo_sub.r_pre_offset = value;
break;
case 2:
video_rgb_ogo_sub.g_pre_offset = value;
break;
case 3:
video_rgb_ogo_sub.b_pre_offset = value;
break;
case 4:
video_rgb_ogo_sub.r_gain = value;
break;
case 5:
video_rgb_ogo_sub.g_gain = value;
break;
case 6:
video_rgb_ogo_sub.b_gain = value;
break;
case 7:
video_rgb_ogo_sub.r_post_offset = value;
break;
case 8:
video_rgb_ogo_sub.g_post_offset = value;
break;
case 9:
video_rgb_ogo_sub.b_post_offset = value;
break;
default:
break;
}
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
ve_ogo_param_update_sub();
#endif
}
static int wb_dbg_flag;
static int wb_rd_val;
static ssize_t amvecm_wb_show(struct class *cla,
@@ -6176,6 +6267,7 @@ static ssize_t amvecm_wb_store(struct class *cls,
{
char *buf_orig, *parm[8] = {NULL};
long value;
struct tcon_rgb_ogo_s *ogo_data;
if (!buffer)
return count;
@@ -6185,106 +6277,237 @@ static ssize_t amvecm_wb_store(struct class *cls,
parse_param_amvecm(buf_orig, (char **)&parm);
if (!strncmp(parm[0], "r", 1)) {
if (!data_path)
ogo_data = &video_rgb_ogo;
else
ogo_data = &video_rgb_ogo_sub;
if (!strncmp(parm[1], "pre_r", 5)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo.r_pre_offset;
wb_rd_val = ogo_data->r_pre_offset;
} else if (!strncmp(parm[1], "pre_g", 5)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo.g_pre_offset;
wb_rd_val = ogo_data->g_pre_offset;
} else if (!strncmp(parm[1], "pre_b", 5)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo.b_pre_offset;
wb_rd_val = ogo_data->b_pre_offset;
} else if (!strncmp(parm[1], "gain_r", 6)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo.r_gain;
wb_rd_val = ogo_data->r_gain;
} else if (!strncmp(parm[1], "gain_g", 6)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo.g_gain;
wb_rd_val = ogo_data->g_gain;
} else if (!strncmp(parm[1], "gain_b", 6)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo.b_gain;
wb_rd_val = ogo_data->b_gain;
} else if (!strncmp(parm[1], "post_r", 6)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo.r_post_offset;
wb_rd_val = ogo_data->r_post_offset;
} else if (!strncmp(parm[1], "post_g", 6)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo.g_post_offset;
wb_rd_val = ogo_data->g_post_offset;
} else if (!strncmp(parm[1], "post_b", 6)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo.b_post_offset;
wb_rd_val = ogo_data->b_post_offset;
} else if (!strncmp(parm[1], "en", 2)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo.en;
wb_rd_val = ogo_data->en;
} else if (!strncmp(parm[1], "pre_r_sub", 9)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo_sub.r_pre_offset;
} else if (!strncmp(parm[1], "pre_g_sub", 9)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo_sub.g_pre_offset;
} else if (!strncmp(parm[1], "pre_b_sub", 9)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo_sub.b_pre_offset;
} else if (!strncmp(parm[1], "gain_r_sub", 10)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo_sub.r_gain;
} else if (!strncmp(parm[1], "gain_g_sub", 10)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo_sub.g_gain;
} else if (!strncmp(parm[1], "gain_b_sub", 10)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo_sub.b_gain;
} else if (!strncmp(parm[1], "post_r_sub", 10)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo_sub.r_post_offset;
} else if (!strncmp(parm[1], "post_g_sub", 10)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo_sub.g_post_offset;
} else if (!strncmp(parm[1], "post_b_sub", 10)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo_sub.b_post_offset;
} else if (!strncmp(parm[1], "en_sub", 6)) {
wb_dbg_flag |= WB_PARAM_RD_UPDATE;
wb_rd_val = video_rgb_ogo_sub.en;
}
} else {
if (kstrtol(parm[1], 10, &value) < 0)
return -EINVAL;
if (!strncmp(parm[0], "wb_en", 5)) {
white_balance_adjust(0, value);
if (!data_path)
white_balance_adjust(0, value);
else
white_balance_adjust_sub(0, value);
pr_info("\t set wb en\n");
} else if (!strncmp(parm[0], "preofst_r", 9)) {
if (value > 1023 || value < -1024) {
pr_info("\t preofst r over range\n");
} else {
white_balance_adjust(1, value);
if (!data_path)
white_balance_adjust(1, value);
else
white_balance_adjust_sub(1, value);
pr_info("\t set wb preofst r\n");
}
} else if (!strncmp(parm[0], "preofst_g", 9)) {
if (value > 1023 || value < -1024) {
pr_info("\t preofst g over range\n");
} else {
white_balance_adjust(2, value);
if (!data_path)
white_balance_adjust(2, value);
else
white_balance_adjust_sub(2, value);
pr_info("\t set wb preofst g\n");
}
} else if (!strncmp(parm[0], "preofst_b", 9)) {
if (value > 1023 || value < -1024) {
pr_info("\t preofst b over range\n");
} else {
white_balance_adjust(3, value);
if (!data_path)
white_balance_adjust(3, value);
else
white_balance_adjust_sub(3, value);
pr_info("\t set wb preofst b\n");
}
} else if (!strncmp(parm[0], "gain_r", 6)) {
if (value > 2047 || value < 0) {
pr_info("\t gain r over range\n");
} else {
white_balance_adjust(4, value);
if (!data_path)
white_balance_adjust(4, value);
else
white_balance_adjust_sub(4, value);
pr_info("\t set wb gain r\n");
}
} else if (!strncmp(parm[0], "gain_g", 6)) {
if (value > 2047 || value < 0) {
pr_info("\t gain g over range\n");
} else {
white_balance_adjust(5, value);
if (data_path)
white_balance_adjust(5, value);
else
white_balance_adjust_sub(5, value);
pr_info("\t set wb gain g\n");
}
} else if (!strncmp(parm[0], "gain_b", 6)) {
if (value > 2047 || value < 0) {
pr_info("\t gain b over range\n");
} else {
white_balance_adjust(6, value);
if (!data_path)
white_balance_adjust(6, value);
else
white_balance_adjust_sub(6, value);
pr_info("\t set wb gain b\n");
}
} else if (!strncmp(parm[0], "postofst_r", 10)) {
if (value > 1023 || value < -1024) {
pr_info("\t postofst r over range\n");
} else {
white_balance_adjust(7, value);
if (!data_path)
white_balance_adjust(7, value);
else
white_balance_adjust_sub(7, value);
pr_info("\t set wb postofst r\n");
}
} else if (!strncmp(parm[0], "postofst_g", 10)) {
if (value > 1023 || value < -1024) {
pr_info("\t postofst g over range\n");
} else {
white_balance_adjust(8, value);
if (!data_path)
white_balance_adjust(8, value);
else
white_balance_adjust_sub(8, value);
pr_info("\t set wb postofst g\n");
}
} else if (!strncmp(parm[0], "postofst_b", 10)) {
if (value > 1023 || value < -1024) {
pr_info("\t postofst b over range\n");
} else {
white_balance_adjust(9, value);
if (!data_path)
white_balance_adjust(9, value);
else
white_balance_adjust_sub(9, value);
pr_info("\t set wb postofst b\n");
}
} else if (!strncmp(parm[0], "wb_en_sub", 9)) {
white_balance_adjust_sub(0, value);
pr_info("\t set sub wb en\n");
} else if (!strncmp(parm[0], "preofst_r_sub", 13)) {
if (value > 1023 || value < -1024) {
pr_info("\t sub preofst r over range\n");
} else {
white_balance_adjust_sub(1, value);
pr_info("\t set sub wb preofst r\n");
}
} else if (!strncmp(parm[0], "preofst_g_sub", 13)) {
if (value > 1023 || value < -1024) {
pr_info("\t sub preofst g over range\n");
} else {
white_balance_adjust_sub(2, value);
pr_info("\t set sub wb preofst g\n");
}
} else if (!strncmp(parm[0], "preofst_b_sub", 13)) {
if (value > 1023 || value < -1024) {
pr_info("\t sub preofst b over range\n");
} else {
white_balance_adjust_sub(3, value);
pr_info("\t set sub wb preofst b\n");
}
} else if (!strncmp(parm[0], "gain_r_sub", 10)) {
if (value > 2047 || value < 0) {
pr_info("\t sub gain r over range\n");
} else {
white_balance_adjust_sub(4, value);
pr_info("\t set sub wb gain r\n");
}
} else if (!strncmp(parm[0], "gain_g_sub", 10)) {
if (value > 2047 || value < 0) {
pr_info("\t sub gain g over range\n");
} else {
white_balance_adjust_sub(5, value);
pr_info("\t set sub wb gain g\n");
}
} else if (!strncmp(parm[0], "gain_b_sub", 10)) {
if (value > 2047 || value < 0) {
pr_info("\t sub gain b over range\n");
} else {
white_balance_adjust_sub(6, value);
pr_info("\t set sub wb gain b\n");
}
} else if (!strncmp(parm[0], "postofst_r_sub", 14)) {
if (value > 1023 || value < -1024) {
pr_info("\t sub postofst r over range\n");
} else {
white_balance_adjust_sub(7, value);
pr_info("\t set sub wb postofst r\n");
}
} else if (!strncmp(parm[0], "postofst_g_sub", 14)) {
if (value > 1023 || value < -1024) {
pr_info("\t sub postofst g over range\n");
} else {
white_balance_adjust_sub(8, value);
pr_info("\t set sub wb postofst g\n");
}
} else if (!strncmp(parm[0], "postofst_b_sub", 14)) {
if (value > 1023 || value < -1024) {
pr_info("\t sub postofst b over range\n");
} else {
white_balance_adjust_sub(9, value);
pr_info("\t set sub wb postofst b\n");
}
}
}
@@ -9345,6 +9568,12 @@ static ssize_t amvecm_debug_store(struct class *cla,
} else if (!strncmp(parm[0], "vpp_state", 9)) {
pr_info("amvecm driver version : %s\n", AMVECM_VER);
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
} else if (!strncmp(parm[0], "main_path", 9)) {
data_path = 0;
pr_info("main data_path: %d\n", data_path);
} else if (!strncmp(parm[0], "sub_path", 8)) {
data_path = 1;
pr_info("sub data_path: %d\n", data_path);
} else if (!strncmp(parm[0], "dma_ctrl", 8)) {
if (chip_type_id == chip_t3x) {
if (kstrtoul(parm[1], 10, &val) < 0)
@@ -9440,16 +9669,20 @@ static ssize_t amvecm_debug_store(struct class *cla,
pr_info("disable vadj2\n");
}
}
#endif
} else if (!strncmp(parm[0], "wb", 2)) {
if (!strncmp(parm[1], "enable", 6)) {
amvecm_wb_enable(1);
if (!data_path)
amvecm_wb_enable(1);
else
amvecm_wb_enable_sub(1);
pr_info("enable wb\n");
} else if (!strncmp(parm[1], "disable", 7)) {
amvecm_wb_enable(0);
if (!data_path)
amvecm_wb_enable(0);
else
amvecm_wb_enable_sub(0);
pr_info("disable wb\n");
}
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
} else if (!strncmp(parm[0], "pre_gamma", 2)) {
if (!strncmp(parm[1], "enable", 6)) {
post_pre_gamma_ctl(WR_VCB, 1);
@@ -9460,10 +9693,16 @@ static ssize_t amvecm_debug_store(struct class *cla,
}
} else if (!strncmp(parm[0], "gamma", 5)) {
if (!strncmp(parm[1], "enable", 6)) {
vecm_latch_flag |= FLAG_GAMMA_TABLE_EN; /* gamma off */
if (!data_path)
vecm_latch_flag |= FLAG_GAMMA_TABLE_EN; /* gamma off */
else
vecm_latch_flag |= FLAG_GAMMA_TABLE_EN_SUB;
pr_info("enable gamma\n");
} else if (!strncmp(parm[1], "disable", 7)) {
vecm_latch_flag |= FLAG_GAMMA_TABLE_DIS;/* gamma off */
if (!data_path)
vecm_latch_flag |= FLAG_GAMMA_TABLE_DIS;/* gamma off */
else
vecm_latch_flag |= FLAG_GAMMA_TABLE_DIS_SUB;
pr_info("disable gamma\n");
} else if (!strncmp(parm[1], "load_protect_en", 15)) {
gamma_loadprotect_en = 1;
@@ -9499,6 +9738,14 @@ static ssize_t amvecm_debug_store(struct class *cla,
vecm_latch_flag |= FLAG_GAMMA_TABLE_G;
vecm_latch_flag |= FLAG_GAMMA_TABLE_B;
}
} else if (!strncmp(parm[0], "gamma_sub", 9)) {
if (!strncmp(parm[1], "enable", 6)) {
vecm_latch_flag |= FLAG_GAMMA_TABLE_EN_SUB; /* gamma on */
pr_info("enable gamma\n");
} else if (!strncmp(parm[1], "disable", 7)) {
vecm_latch_flag |= FLAG_GAMMA_TABLE_DIS_SUB; /* gamma off */
pr_info("disable gamma\n");
}
} else if (!strncmp(parm[0], "sr", 2)) {
if (!strncmp(parm[1], "peaking_en", 10)) {
amvecm_sharpness_enable(0);
@@ -11459,7 +11706,7 @@ void init_pq_setting(void)
int bitdepth;
pr_info("pq_setting_init start.\n");
/*pr_info("pq_setting_init start.\n");*/
if (vinfo_lcd_support())
init_pq_control(PQ_TV);
@@ -12475,7 +12722,7 @@ static void aml_vecm_dt_parse(struct amvecm_dev_s *devp, struct platform_device
} else {
amcm_disable(WR_VCB);
}
pr_info("cm_init done.\n");
/*pr_info("cm_init done.\n");*/
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
res_viu2_vsync_irq =
@@ -12675,7 +12922,7 @@ static int aml_vecm_probe(struct platform_device *pdev)
struct amvecm_dev_s *devp = &amvecm_dev;
memset(devp, 0, (sizeof(struct amvecm_dev_s)));
pr_info("\n VECM probe start\n");
/*pr_info("\n VECM probe start\n");*/
#ifndef CONFIG_AMLOGIC_ZAPPER_CUT
hdr_lut_buffer_malloc(pdev);
#endif
drivers/media/enhancement/amvecm/s5_set_hdr2_v0.c
+1 -1
View File
@@ -2633,7 +2633,7 @@ void hdr_lut_buffer_malloc(struct platform_device *pdev)
alloc_size = DMA_SIZE_TOTAL_HDR;
dma_vaddr = dma_alloc_coherent(&vecm_dev,
alloc_size, &dma_paddr, GFP_KERNEL);
pr_info("hdr dma_vaddr: %px\n", (u32 *)(dma_vaddr));
/*pr_info("hdr dma_vaddr: %px\n", (u32 *)(dma_vaddr));*/
}
void hdr_lut_buffer_free(struct platform_device *pdev)
drivers/media/enhancement/amvecm/vlock.c
+11 -11
View File
@@ -284,8 +284,8 @@ int vlock_init_reg_map(struct device *dev, struct stvlock_sig_sts *pvlock)
return -ENOMEM;
}
}
pr_info("ID:0x%x map phy: 0x%x 0x%p\n", i, vlock_reg_maps[i].phy_addr,
vlock_reg_maps[i].p);
/*pr_info("ID:0x%x map phy: 0x%x 0x%p\n", i, vlock_reg_maps[i].phy_addr,*/
/* vlock_reg_maps[i].p);*/
}
return 0;
@@ -2282,12 +2282,12 @@ void vlock_status_init(void)
pvlock->enc_frc_max_line = pvlock->org_enc_line_num;
pvlock->enc_frc_max_pixel = pvlock->org_enc_pixel_num;
}
pr_info("vlock: enc org Line addr:0x%x org_enc_line_num val: %d\n",
pvlock->enc_max_line_addr + offset_enc,
pvlock->org_enc_line_num);
pr_info("vlock: enc org Pixel addr:0x%x val: %d\n",
pvlock->enc_max_pixel_addr + offset_enc,
pvlock->org_enc_pixel_num);
/*pr_info("vlock: enc org Line addr:0x%x org_enc_line_num val: %d\n",*/
/* pvlock->enc_max_line_addr + offset_enc,*/
/* pvlock->org_enc_line_num);*/
/*pr_info("vlock: enc org Pixel addr:0x%x val: %d\n",*/
/* pvlock->enc_max_pixel_addr + offset_enc,*/
/* pvlock->org_enc_pixel_num);*/
pvlock->fsm_sts = VLOCK_STATE_NULL;
pvlock->fsm_prests = VLOCK_STATE_NULL;
pvlock->vf_sts = false;
@@ -2327,10 +2327,10 @@ void vlock_status_init(void)
msleep(2);
vlock_disable_step2(pvlock);
pr_info("%s vlock_en:%d\n", __func__, vlock_en);
/*pr_info("%s vlock_en:%d\n", __func__, vlock_en);*/
}
pr_info("%s vlock_en:%d adj_type:%d mode:%d\n", __func__, vlock_en,
vinfo->fr_adj_type, vinfo->mode);
/*pr_info("%s vlock_en:%d adj_type:%d mode:%d\n", __func__, vlock_en,*/
/* vinfo->fr_adj_type, vinfo->mode);*/
}
void vlock_dt_match_init(struct vecm_match_data_s *pdata)