mm: add aml memory debug tools. [1/1]

PD#SWPL-185599

Problem:
add aml memory debug tools

Solution:
enable aml smmu for pcie white list.
enable filecache, watchpoint, userfault, mem_debug, reg_access.

Verify:
sc2.

Change-Id: I2549778560672bc66dcdfe767b5f81f8585293d5
Signed-off-by: Jianxiong Pan <jianxiong.pan@amlogic.com>
This commit is contained in:
Jianxiong Pan
2024-09-13 13:39:43 +08:00
parent 73604c9f07
commit e7f50e0dae
5 changed files with 53 additions and 63 deletions
+6 -6
View File
@@ -16,15 +16,15 @@ CONFIG_DMABUF_HEAPS_SYSTEM=m
# amlogic-memory-debug.ko
CONFIG_AMLOGIC_CMA=n
CONFIG_AMLOGIC_PAGE_TRACE=n
CONFIG_AMLOGIC_FAKE_SMMU=n
CONFIG_AMLOGIC_MEMORY_DEBUG=n
CONFIG_AMLOGIC_USER_FAULT=n
CONFIG_AMLOGIC_MEM_DEBUG=n
CONFIG_AMLOGIC_USER_FAULT=m
CONFIG_AMLOGIC_MEM_DEBUG=m
CONFIG_AMLOGIC_MEMORY_DEBUG=m
CONFIG_AMLOGIC_FAKE_SMMU=y
CONFIG_AMLOGIC_FILE_CACHE=y
CONFIG_AMLOGIC_WATCHPOINT=y
CONFIG_AMLOGIC_REG_ACCESS=y
CONFIG_AMLOGIC_RAMDUMP=y
CONFIG_AMLOGIC_DDR_TOOL=y
CONFIG_AMLOGIC_RAMDUMP=n
CONFIG_AMLOGIC_DDR_TOOL=n
CONFIG_AMLOGIC_DDR_BANDWIDTH=y
CONFIG_AMLOGIC_DDR_BANDWIDTH_S4=y
CONFIG_AMLOGIC_DDR_BANDWIDTH_G12=y
-2
View File
@@ -2,7 +2,6 @@
config AMLOGIC_FILE_CACHE
bool "Amlogic file cache"
depends on AMLOGIC_MEMORY_EXTEND
default n
help
Memory debug which statisticint filecache information.
@@ -10,7 +9,6 @@ config AMLOGIC_FILE_CACHE
config AMLOGIC_WATCHPOINT
bool "Amlogic point driver"
depends on AMLOGIC_MEMORY_EXTEND
depends on HAVE_HW_BREAKPOINT
default n
help
+2 -2
View File
@@ -180,7 +180,7 @@ static struct iommu_device *aml_smmu_add_device(struct device *dev)
return 0;
}
static int aml_smmu_of_xlate(struct device *dev, struct of_phandle_args *args)
static int aml_smmu_of_xlate(struct device *dev, const struct of_phandle_args *args)
{
dev->iommu_group = (struct iommu_group *)aml_global_group;
return 0;
@@ -760,7 +760,7 @@ static int __nocfi aml_atomic_pool_expand(struct device *dev, struct gen_pool *p
int ret = -ENOMEM;
/* Cannot allocate larger than MAX_ORDER-1 */
order = min(get_order(pool_size), MAX_ORDER - 1);
order = min(get_order(pool_size), NR_PAGE_ORDERS - 1);
page = aml_dma_alloc_from_contiguous(dev, 1 << order,
order, false);
+42 -50
View File
@@ -55,32 +55,28 @@ struct aml_watch_points {
struct aml_watch_points *awp;
#ifdef CONFIG_ARM64
#define READ_WB_REG_CASE(OFF, N, REG, VAL) \
do { \
case (OFF + N): \
AARCH64_DBG_READ(N, REG, VAL); \
break; \
} while (0)
#define READ_WB_REG_CASE(OFF, N, REG, VAL) \
case (OFF + N): \
AARCH64_DBG_READ(N, REG, VAL); \
break
#define GEN_READ_WB_REG_CASES(OFF, REG, VAL) \
do { \
READ_WB_REG_CASE(OFF, 0, REG, VAL); \
READ_WB_REG_CASE(OFF, 1, REG, VAL); \
READ_WB_REG_CASE(OFF, 2, REG, VAL); \
READ_WB_REG_CASE(OFF, 3, REG, VAL); \
READ_WB_REG_CASE(OFF, 4, REG, VAL); \
READ_WB_REG_CASE(OFF, 5, REG, VAL); \
READ_WB_REG_CASE(OFF, 6, REG, VAL); \
READ_WB_REG_CASE(OFF, 7, REG, VAL); \
READ_WB_REG_CASE(OFF, 8, REG, VAL); \
READ_WB_REG_CASE(OFF, 9, REG, VAL); \
READ_WB_REG_CASE(OFF, 10, REG, VAL); \
READ_WB_REG_CASE(OFF, 11, REG, VAL); \
READ_WB_REG_CASE(OFF, 12, REG, VAL); \
READ_WB_REG_CASE(OFF, 13, REG, VAL); \
READ_WB_REG_CASE(OFF, 14, REG, VAL); \
READ_WB_REG_CASE(OFF, 15, REG, VAL); \
} while (0)
#define GEN_READ_WB_REG_CASES(OFF, REG, VAL) \
READ_WB_REG_CASE(OFF, 0, REG, VAL); \
READ_WB_REG_CASE(OFF, 1, REG, VAL); \
READ_WB_REG_CASE(OFF, 2, REG, VAL); \
READ_WB_REG_CASE(OFF, 3, REG, VAL); \
READ_WB_REG_CASE(OFF, 4, REG, VAL); \
READ_WB_REG_CASE(OFF, 5, REG, VAL); \
READ_WB_REG_CASE(OFF, 6, REG, VAL); \
READ_WB_REG_CASE(OFF, 7, REG, VAL); \
READ_WB_REG_CASE(OFF, 8, REG, VAL); \
READ_WB_REG_CASE(OFF, 9, REG, VAL); \
READ_WB_REG_CASE(OFF, 10, REG, VAL); \
READ_WB_REG_CASE(OFF, 11, REG, VAL); \
READ_WB_REG_CASE(OFF, 12, REG, VAL); \
READ_WB_REG_CASE(OFF, 13, REG, VAL); \
READ_WB_REG_CASE(OFF, 14, REG, VAL); \
READ_WB_REG_CASE(OFF, 15, REG, VAL)
#ifdef CONFIG_CC_IS_CLANG
#pragma clang diagnostic push
@@ -134,32 +130,28 @@ static int aml_get_num_wrps(void)
#endif
}
#else
#define READ_WB_REG_CASE(OP2, M, VAL) \
do { \
case ((OP2 << 4) + M): \
ARM_DBG_READ(c0, c ## M, OP2, VAL); \
break; \
} while (0)
#define READ_WB_REG_CASE(OP2, M, VAL) \
case ((OP2 << 4) + M): \
ARM_DBG_READ(c0, c ## M, OP2, VAL); \
break
#define GEN_READ_WB_REG_CASES(OP2, VAL) \
do { \
READ_WB_REG_CASE(OP2, 0, VAL); \
READ_WB_REG_CASE(OP2, 1, VAL); \
READ_WB_REG_CASE(OP2, 2, VAL); \
READ_WB_REG_CASE(OP2, 3, VAL); \
READ_WB_REG_CASE(OP2, 4, VAL); \
READ_WB_REG_CASE(OP2, 5, VAL); \
READ_WB_REG_CASE(OP2, 6, VAL); \
READ_WB_REG_CASE(OP2, 7, VAL); \
READ_WB_REG_CASE(OP2, 8, VAL); \
READ_WB_REG_CASE(OP2, 9, VAL); \
READ_WB_REG_CASE(OP2, 10, VAL); \
READ_WB_REG_CASE(OP2, 11, VAL); \
READ_WB_REG_CASE(OP2, 12, VAL); \
READ_WB_REG_CASE(OP2, 13, VAL); \
READ_WB_REG_CASE(OP2, 14, VAL); \
READ_WB_REG_CASE(OP2, 15, VAL); \
} while (0)
#define GEN_READ_WB_REG_CASES(OP2, VAL) \
READ_WB_REG_CASE(OP2, 0, VAL); \
READ_WB_REG_CASE(OP2, 1, VAL); \
READ_WB_REG_CASE(OP2, 2, VAL); \
READ_WB_REG_CASE(OP2, 3, VAL); \
READ_WB_REG_CASE(OP2, 4, VAL); \
READ_WB_REG_CASE(OP2, 5, VAL); \
READ_WB_REG_CASE(OP2, 6, VAL); \
READ_WB_REG_CASE(OP2, 7, VAL); \
READ_WB_REG_CASE(OP2, 8, VAL); \
READ_WB_REG_CASE(OP2, 9, VAL); \
READ_WB_REG_CASE(OP2, 10, VAL); \
READ_WB_REG_CASE(OP2, 11, VAL); \
READ_WB_REG_CASE(OP2, 12, VAL); \
READ_WB_REG_CASE(OP2, 13, VAL); \
READ_WB_REG_CASE(OP2, 14, VAL); \
READ_WB_REG_CASE(OP2, 15, VAL)
static u32 read_wb_reg(int n)
{
+3 -3
View File
@@ -8,9 +8,9 @@ OEM_PROJECT_MODULES = [
AMLOGIC_GKI20_MODULES = [
# "common_drivers/drivers/memory_ext/aml_cma.ko",
# "common_drivers/drivers/memory_ext/mem_debug.ko",
"common_drivers/drivers/memory_ext/mem_debug.ko",
# "common_drivers/drivers/memory_ext/page_trace.ko",
# "common_drivers/drivers/memory_ext/user_fault.ko",
"common_drivers/drivers/memory_ext/user_fault.ko",
]
AMLOGIC_GKI10_MODULES = [
@@ -74,7 +74,7 @@ AMLOGIC_COMMON_MODULES = [
"common_drivers/drivers/mailbox/amlogic-mailbox.ko",
# "common_drivers/drivers/media/aml_media.ko",
# "common_drivers/drivers/media/camera/amlogic-camera.ko",
# "common_drivers/drivers/memory_debug/amlogic-memory-debug.ko",
"common_drivers/drivers/memory_debug/amlogic-memory-debug.ko",
"common_drivers/drivers/mmc/host/amlogic-mmc.ko",
# "common_drivers/drivers/net/ethernet/stmicro/stmmac/amlogic-phy-debug.ko",
# "common_drivers/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.ko",