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dsp: A1 cannot resume after suspend [1/1]

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PD#SWPL-182091

Problem:
clk disabled when a1 suspend,so a1 kernel5.15 cannot resume after
suspend

Solution:
clk don't disabled when a1 suspend

Verify:
a1

Change-Id: Ia6ab752230fcbb3d721c9ef9c7716341d7c75115
Signed-off-by: Liming Xue <liming.xue@amlogic.com>
This commit is contained in:
Liming Xue
2024-08-15 14:24:22 +08:00
committed by gerrit autosubmit
parent 1d03a8c86d
commit ea372d4f71
2 changed files with 24 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/boot/dts/amlogic/meson-a1.dtsi
+12
View File
@@ -1121,6 +1121,12 @@
<0xfe005a84 0x4>, /*host health reg*/
<0x0 0x1000000>; /*host ddrfw region [offset size]*/
clock-names = "dspa_clk";
/* bit0: pm_support_suspend
* bit1: pm_support_always_on
* bit2: pm_support_pwrctrl
* bit3: pm_support_ffv
*/
pm-support = /bits/ 8 <0x2>;
mboxes = <&mbox_pl A1_REE2DSPA_DSP>;
clocks = <&clkc CLKID_DSPA_SEL>;
power-domains = <&pwrdm PDID_DSP_A>;
@@ -1139,6 +1145,12 @@
<0xfe005a98 0x4>,
<0x0 0x400000>; /*host ddrfw region [offset size]*/
clock-names = "dspb_clk";
/* bit0: pm_support_suspend
* bit1: pm_support_always_on
* bit2: pm_support_pwrctrl
* bit3: pm_support_ffv
*/
pm-support = /bits/ 8 <0x2>;
mboxes = <&mbox_pl A1_REE2DSPB_DSP>;
clocks = <&clkc CLKID_DSPB_SEL>;
power-domains = <&pwrdm PDID_DSP_B>;
arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+12
View File
@@ -1110,6 +1110,12 @@
<0x0 0x0 0x0 0x1000000>; /*host ddrfw region [offset size]*/
clocks = <&clkc CLKID_DSPA_SEL>;
clock-names = "dspa_clk";
/* bit0: pm_support_suspend
* bit1: pm_support_always_on
* bit2: pm_support_pwrctrl
* bit3: pm_support_ffv
*/
pm-support = /bits/ 8 <0x2>;
mboxes = <&mbox_pl A1_REE2DSPA_DSP>;
power-domains = <&pwrdm PDID_DSP_A>;
clkfreq-khz = <384000>;
@@ -1127,6 +1133,12 @@
<0x0 0xfe005a98 0x0 0x4>, /*host health reg*/
<0x0 0x0 0x0 0x400000>; /*host ddrfw region [offset size]*/
clock-names = "dspb_clk";
/* bit0: pm_support_suspend
* bit1: pm_support_always_on
* bit2: pm_support_pwrctrl
* bit3: pm_support_ffv
*/
pm-support = /bits/ 8 <0x2>;
mboxes = <&mbox_pl A1_REE2DSPB_DSP>;
clocks = <&clkc CLKID_DSPB_SEL>;
power-domains = <&pwrdm PDID_DSP_B>;