PD#SWPL-180332
Problem:
add flip function for led
add data mode select for led
Solution:
add this config
Verify:
t6d br301
t5m ay301
Change-Id: Ice3e3ff86d2b0823e1f2b1aea852f4bafc9fd3b7
Signed-off-by: Junyi Zhao <junyi.zhao@amlogic.com>
PD#SWPL-180321
Problem:
there are no usb pll and usb clock
Solution:
add usb pll and usb clock
Verify:
t6d br301
Change-Id: I24f381493a3f8d7d3510252fdc35ab2eb9b09b7e
Signed-off-by: jian.hu <jian.hu@amlogic.com>
PD#SWPL-180321
Problem:
it does not support amfc
Solution:
add amfc support
Verify:
t6d br301
Change-Id: Idb0d1d8aa3571402a636bd75018735fcb82bc489
Signed-off-by: jian.hu <jian.hu@amlogic.com>
PD#SWPL-180321
Problem:
there is no eth phy clock
Solution:
correct eth phy clock name
Verify:
t6d br301
Change-Id: Ie8ff90cf998c4a8064f01e4e52d63b7e284b4dd3
Signed-off-by: jian.hu <jian.hu@amlogic.com>
PD#SWPL-165710
Problem:
need to support reset
Solution:
support reset
Verify:
t6d
Change-Id: I909fc7a0417cb753c47a142e288946d9a59d45da
Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
PD#SWPL-179629
Problem:
1 Optimize driver file formats using automated tools.
2 vpu_clk adds a flag feature to prevent glitch when operating the
clock.
3 The naming of hifi_pll is inconsistent with the clkid style.
4 The latest documentation provided by vlsi has changed the sys_clk
definition for USB and PCIe.
Solution:
1 Optimized
2 vpu_clk added flag CLK_OPS_PARENT_ENABLE.
3 The clkid of hifi_pll is named CLKID_HIFI_PLL.
4 USB and PCIe sys_clk have been updated.
Verify:
s6_bl201
Change-Id: I4560f7bc6d42583d4e62d184c182bfe199cb6955
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-139800
Problem:
SC2 far field voice need early suspend and record
with dsp.
Solution:
When DSP waked up by VAD, then:
1. DSP notify to AOCPU (would fail by unknown cmd) and ARM
during early suspend.
2. DSP notify to AOCPU (would fail by unknown cmd) and ARM
(would fail by timeout) and do retry after ARM deep sleep and
before AOCPU STR poweroff.
3. DSP notify to AOCPU after AOCPU STR poweroff.
4. when ffv not supported, dsp do not start vwe.
Verify:
sc2_ah212
Change-Id: I0e610ab7dd76c362c71a9ec98ce589bf7d04beda
Signed-off-by: bangzheng.liu <bangzheng.liu@amlogic.com>
PD#SWPL-174549
Problem:
secure permission needs to be set for the pwm_clk register
related to voltage regulation. Relevant clk configurations
need to be stored in bl31. kernel configurations need to
be deleted.
Solution:
fix it
Verify:
s7
Change-Id: If3477940b33f4a612743cb1c5c58ce45e59a8505
Signed-off-by: yiting.deng <yiting.deng@amlogic.com>
PD#SWPL-172965
Problem:
1 The mclk0 power supply uses the power supply inside the mclk_pll, so the
mclk0 output must ensure that mclk_pll is also enabled.
mclk_pll_clk can output clocks mclk_pll_src and fclk50m. The existence of
these two clock sources is meaningless.
2 If mclk0 uses mclk_pll as the clock source, div2 must be selected for
the clock of the later stage; otherwise, the output clock waveform of
mclk0 is abnormal.
Solution:
1 Delete the mclk_pll_src and fclk50m clock sources and set mclk_pll_clk
as the clock source of mclk0.
2 mclk0 selects div2 by default.
Verify:
s6_bl201
Change-Id: I9a8e3e1616b4c9b3b9c86990f86dc337f9f9c877
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-172965
Problem:
1 All I2C Masters (i2c_m_a-f) in a chip share an APB bus, which is
provided by sys_i2c_m_a. PWM is designed with a similar architecture, and
the APB bus of PWM is clock provided by sys_pwm_a.
2 The CLKID definition of smart card is inconsistent.
Solution:
1 The parent of sys_i2c_m_b-f is set to sys_i2c_m_a.
2 The parent of sys_pwm_b-i is set to sys_pwm_a.
3 CLKID_SC_DIV was renamed CLKID_SC.
Verify:
s6_bl201
Change-Id: I94482625f3a9fe387113edce21ed16e9dc63a074
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-172976
Problem:
add aocpu alive detection and mailbox retry mechanism to
avoid mailbox message lost due to aocpu crash or mailbox
signal lost occasionally
Solution:
add aocpu alive detection and mailbox retry mechanism
Verify:
S6-BL201
Change-Id: Ia90380a7ead99e7f00eb82bcde02201f4636dd30
Signed-off-by: Yao Jie <jie.yao@amlogic.com>
PD#SWPL-172965
Problem:
1 mclk_pll and dspa_clk output are incorrect
2 mmc failed to insmod
3 Lost sys_i2c_s_a
Solution:
1 Update the table for mclk_pll
2 Update the parent table of the dspa
3 Ignore initializing gp0_pll
4 Added sys_i2c_s_a
Verify:
s6_bl201
Change-Id: I23586623d908ef871e178acf0da8883aabc12fc9
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-158289
Problem:
1 The register corresponding to oscin was updated;
2 Put some of the key clocks into bl31 for processing.
Solution:
fixed
Verify:
pxp
Change-Id: Ie5ea8b6c507ce136ba397e8e54362b72f05cf45c
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-153862
Problem:
s6 need power domain support.
Solution:
add power domain in kernel.
Verify:
pxp
Change-Id: I5ba46225cb08a4a92d43fe25d7f6385d65bf6efb
Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com>
PD#SWPL-164972
Problem:
1.The AMFC module is currently configured to always on.
In order to save power consumption, power can be
removed during suspend.
2.usb power domain naming is not standard
Solution:
1.Cancel the AMFC always on configuration.
2.Change the usb domain name
Verify:
S7D
Change-Id: Ib92ffee894f248f7edb2a358bddc548543c68719
Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com>
PD#SWPL-163105
Problem:
new earc Rx design
Solution:
changelist from https://scgit.amlogic.com/#/c/417153
1. new default setting for arc in
2. remove pll refresh when startup
3. when cmdc init, need refresh pll after pll default setting
4. force channel sync for channel mapping
5. add dmac bit29 check for common arc check
6. add iec raw channel status check
7. use chip info(arc_ch_sync/arc_in_new)
Verify:
use s7d
Change-Id: Id681334bfde57bfe71a870a16859e24712e262e3
Signed-off-by: qing.zhang <qing.zhang@amlogic.com>
PD#SWPL-163896
Problem:
1.need to clean out the power that
is always on to save power.
2.Some modules related to mempd have
been added for debugging later.
Solution:
1.Clean up an open power supply.
2.add power domain config.
Verify:
S7D
Change-Id: Ic313a24168041cb925483202bc26f9c53c6b1548
Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com>
PD#SWPL-163059
Problem:
legacy ir controller was updated to multi-format ir controller
and each controller have a IRQ
Solution:
support 2 IRQs in ir driver
Verify:
s7d_bm201
Change-Id: I268562144440d642e4f635dbe76bb45f799d6bee
Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
PD#SWPL-163760
Problem:
When modules send mailbox message to aocpu, sometimes
aocpu can not response because of stuck or interrupt
signal lost, at this time driver modules need to know
whether aocpu is alive or not, this is helpful to debug.
Solution:
Add aocpu alive check mechanism, when aocpu did not
response, system will check and print aocpu status.
Verify:
S7D-BM209
Change-Id: I285a300313c1439be2ed50fafc58c4a92fa032ac
Signed-off-by: Yao Jie <jie.yao@amlogic.com>
PD#SWPL-163061
Problem:
If there are more requirements of mailbox channels
application for other modules, mailbox driver should
be changed to add more channels, this is inconvenient
for other drivers usage
Solution:
Allocate more reserved mailbox channels for other
modules application in the future
Verify:
S7D-BM209
Change-Id: I669d42aa386676d959e27ebb51c6d7dedd7d54ac
Signed-off-by: Yao Jie <jie.yao@amlogic.com>
PD#SWPL-163077
Problem:
Some new power domains have been added.
Solution:
Add the relevant configuration.
Verify:
S7D
Change-Id: I7f5bc148d0034ffad96b1f04f00417ec5796dced
Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com>
PD#SWPL-158288
Problem:
1 Adding the logic associated with the en0p5 member makes the driver's
processing more complicated and messy.
2 Added clocks with security permissions.
Solution:
1 Only add CLK_MESON_PLL_FIXED_EN0P5 flag to implement the functions
of en0p5, so that the driver change cost is minimal.
2 Determine whether to add the CLK_MESON_PLL_FIXED_EN0P5 flag based
on whether en0p5 is enabled in init_regs.
3 Added scmi clocks
Verify:
pxp
Change-Id: I2f9e258569f4bed44cb5fd9b57368dbfa3c425cb
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-154090
Problem:
The S7D and S7 power domain names overlap
and need to be repaired.
Solution:
modify config.
Verify:
Compile through.
Change-Id: Ia0d18a5a2684184b8c5938c77b8b7adccd8b0ad6
Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com>
PD#SWPL-146595
Problem:
S7D need power domain in kernel.
Solution:
add power domain in kernel.
Verify:
pxp
Change-Id: Ia05ec9960f38388444ae14869576f8cd1d51cf78
Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com>
PD#SWPL-151540
Problem:
kasan failed
cat/echo sysfs osd node crash in s5
cat fbdump return zero size file in s5
Solution:
reset BLOCK_ID_MAX with 32
sysfs node should according to vpu block by index
set correct plane index
Verify:
s5, t5m
Test:
DRM-OSD-17
Change-Id: I02094c9044b172af46ab9b5bd5688a12f18ce96a
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
jian.hu