PD#SWPL-176242
Problem:
dmaheap driver need support debug & class node
gralloc need use ioctl to get dmaheap info
Solution:
add class and debug node for dmaheap
add dmaheap ioctl for gralloc
Verify:
s7d
Change-Id: I60fa73f6c51bbb37fc81531e61b28ecd1fbf700f
Signed-off-by: Yongjie Zhu <yongjie.zhu@amlogic.com>
PD#SWPL-177051
Problem:
1 Di module can not call proxy api for 5.15.
Solution:
1 Move MediaProxy to kernel common for 5.15.
Verify:
t5m
Change-Id: I573f51392c809b77bf6a2e8194a4a3a451f1cc35
Signed-off-by: hualing chen <hualing.chen@amlogic.com>
PD#SWPL-176719
Problem:
when pwm's clk be locked by tee, all pwm should follow tee.
so, should support wifi 32K on pwm tee module.
in case of clk of wifi's pwm channel being locked.
Solution:
add double channel to match wifi 32K legacy used.
Verify:
s7
Signed-off-by: Junyi Zhao <junyi.zhao@amlogic.com>
Change-Id: I343be31d409cf1480b5681acc1ec83fd7a7fad5c
PD#SWPL-175916
Problem:
need support different unmute time for upper layer UI switch
Solution:
support different unmute time for upper layer UI switch
Verify:
bc302
Change-Id: I2018f8380ba186f2a232adfb8a24c734bf95bdc3
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
PD#SWPL-179629
Problem:
1 Optimize driver file formats using automated tools.
2 vpu_clk adds a flag feature to prevent glitch when operating the
clock.
3 The naming of hifi_pll is inconsistent with the clkid style.
4 The latest documentation provided by vlsi has changed the sys_clk
definition for USB and PCIe.
Solution:
1 Optimized
2 vpu_clk added flag CLK_OPS_PARENT_ENABLE.
3 The clkid of hifi_pll is named CLKID_HIFI_PLL.
4 USB and PCIe sys_clk have been updated.
Verify:
s6_bl201
Change-Id: I4560f7bc6d42583d4e62d184c182bfe199cb6955
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-177679
Problem:
S6 usb high power.
speed-drop usb devices.
u2phy disconnect, squelch & edgedrv cali
Solution:
Optimise suspend logic by holding usb controller reset bit,
usb controller comb reset bit, usb2_phy_reset_bit, usb3_phy_reset_bit
.Besides:
1. reset usb3_apb_reset_bit and leave it set then modify corresponding
static regs for low power.
2. off unused usb3phy digital 100M clk.
3. Some quirky devices take >2s to turn on Rterm and begin polling
after resume, which is seen in the new clean usb3 phy. This leads
to wait_for_connected timeout when resuming. Add XHCI_MISSING_CAS
for xHC to workaround by asserting warm reset at resume.
The speed-drop usb devices TX maybe unstable at insertion, leading to
CDR KI overload. Delay freq tracking start point by modifying fr_en
delay 1us->300us.
Modify params in driver & dts.
Verify:
BL201.
Change-Id: I4d6139ecad79e8582ada818338fcf53a1d66b131
Signed-off-by: dian.shao <dian.shao@amlogic.com>
PD#SWPL-175417
Problem:
if any cmd resp timeout error in HS400es will not
continue to send the stop command.
Solution:
if there is cmd resp timeout error, we need to
send stop command additionally.
Verify:
txhd2
Change-Id: Id6652ab18e8e7b4281e06d8ff537986bdf60a31e
Signed-off-by: Long <long.yu@amlogic.com>
PD#SWPL-174270
Problem:
display service limit DRM connector type to range of u8 type
Solution:
amlogic extend connector type 99 ~ 202
Verify:
t7c
Test:
DRM-OSD-1
Change-Id: I13ac283deadaab996d75bd9948a76110e7cc4325
Signed-off-by: congyang.huang <congyang.huang@amlogic.com>
PD#SWPL-179542
Problem:
dirspi_async is designed for the ldim isr. Unfortunately, the
clk_set_rate and clk_get_rate it calls use a mutex lock, which
will lead to a mutex lock panic.
Solution:
Set spi speed in spi_setup only when controller_data use_dirspi=1
Pre-save the spi speed to avoid calling clk_get_rate
Verify:
t5m
Change-Id: I4fdf9d3be687901a5e8cffa1f838f99551b7d94a
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
PD#SWPL-177527
PD#SWPL-173088
PD#SWPL-173090
Problem:
The HPD signal may be come from HDMI HPD, but eARC has HPD
status from status bits
Solution:
Add reading EDID data in external plugin handler with mutex
No external plugout handler
Verify:
sc2, t7c
Test:
DRM-TX-38
Change-Id: I443e69aa6c8949a0d49df476108414431fd067d7
Signed-off-by: zongdong.jiao <zongdong.jiao@amlogic.com>
PD#SWPL-151623
Problem:
platform app can not access /sys
Solution:
use ioctl to do that.
Verify:
Local
Change-Id: I107e11acc38ae411c0a344ad2d322338e98509b7
Signed-off-by: Yan.Yan <yan.yan@amlogic.com>
PD#SWPL-174974
Problem:
ldim require a hw interface dirspi_xfer to run in interrupt handle
Solution:
add a hw interface dirspi_xfer for ldim
Verify:
t5m ay301
Change-Id: I26e1a9890cc45ac0420d15ebea5e0a4bf2f18a56
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
PD#SWPL-168205
Problem:
lcevc data cannot be passed backward to vpp.
Solution:
add lcevc data path for pipeline.
Verify:
S7D
Change-Id: I656baa444025f4aaebfea67e19a011c152961c5f
Signed-off-by: zhenteng.tian <zhenteng.tian@amlogic.com>
PD#SWPL-176790
Problem:
S6: support read cali data
Solution:
S6: support read cali data
Verify:
S6 BL208
Change-Id: I3c3d7ba9f6b9ad619141ef0496b74c6648007d4a
Signed-off-by: Zhongfu Luo <zhongfu.luo@amlogic.com>
PD#SWPL-177015
Problem:
recovery mode ldim not work;
different mcu have different init times.
Solution:
add ini parameter to set
hw init on stable delay.
Verify:
t3x
Change-Id: Ia74161c5f541a84ed820e72a3a78e769b63a13e7
Signed-off-by: zijie.lin <zijie.lin@amlogic.com>
PD#SWPL-101847
Problem:
drm write registers to rdma table one by one, due to rdma table update
and rdma manager flush to real register are out of sync, so we want to
creat a fake table, the fake table will copy to rdma table after
pipeline register write done, and then config rdma vsync
Solution:
add rdma table for drm osd registers, and it can dynamic switching by
this node /sys/class/drm/card0/crtc0/rdma_table_switch.
echo 1 > /sys/class/drm/card0/crtc0/rdma_table_switch switch off
echo 0 > /sys/class/drm/card0/crtc0/rdma_table_switch switch on
Verify:
T3x s7 s5
Test:
DRM-OSD-33
Change-Id: I053daa7daaab672f8b1e9fc2c38a2d60552d6288
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
PD#SWPL-166466
Problem:
add rotation feature for T3
Solution:
add rotation feature for T3
Verify:
t3
Change-Id: I5865ff4843c3acdada755f1529fd0c41a0da972a
Signed-off-by: Jihong Sui <jihong.sui@amlogic.com>
PD#SWPL-176775
Problem:
scatter keep size need expand for vdin
Solution:
scatter user can set scatter keep size
by register scatter owner.
Verify:
ohm
Change-Id: I4be8af6dff0454cda9191666ec48cd1e03464127
Signed-off-by: Hao Shi <hao.shi@amlogic.com>
PD#SWPL-168620
Problem:
when osd3 on/off, core2a and core2c reset, but lut
updated fail; drm enable osd3 is one vsync earlier
then dv core2c
Solution:
1.drm set core2c lut when osd3 off->on
2.add force_toggle_once debug
Verify:
s5
Test:
s5
Change-Id: I5fe2a7abd1f4b887da5f32a655a24418fee86b64
Signed-off-by: yao liu <yao.liu@amlogic.com>
PD#SWPL-139800
Problem:
SC2 far field voice need early suspend and record
with dsp.
Solution:
When DSP waked up by VAD, then:
1. DSP notify to AOCPU (would fail by unknown cmd) and ARM
during early suspend.
2. DSP notify to AOCPU (would fail by unknown cmd) and ARM
(would fail by timeout) and do retry after ARM deep sleep and
before AOCPU STR poweroff.
3. DSP notify to AOCPU after AOCPU STR poweroff.
4. when ffv not supported, dsp do not start vwe.
Verify:
sc2_ah212
Change-Id: I0e610ab7dd76c362c71a9ec98ce589bf7d04beda
Signed-off-by: bangzheng.liu <bangzheng.liu@amlogic.com>
PD#SWPL-175088
Problem:
new ioctl cmd for get chip id.
Solution:
add new ioctl cmd and flow.
Verify:
t982
Change-Id: If7384905cbad3b9ee2c770a837ba98cf4031cd34
Signed-off-by: qinghui.jiang <qinghui.jiang@amlogic.com>
PD#SWPL-176326
Problem:
s6 need to support 1080p120hz
Solution:
s6 need to support 1080p120hz
Verify:
S6
Test:
DRM-TX-130
Change-Id: I594f9671b36d3ea27c838bcf349a06cdcf2c707c
Signed-off-by: ruofei.zhao <ruofei.zhao@amlogic.com>
PD#SWPL-175926
Problem:
In DLG mode, display size is 3840x1080, aoi reg
is updated to 3840x1080, if disable/enable video
with no toggle, aoi reg will continue to be halved
Solution:
record the ori and updated AOI with new variables
Verify:
t5m
Change-Id: Idbc479a1d157fb35be131b7b9896e5cbf0ee3b67
Signed-off-by: yao liu <yao.liu@amlogic.com>
PD#SWPL-174927
Problem:
currently apk like netflix get hdcp status
from hdmitx driver instead of drm, need to
use unify interface of drm to get hdcp status.
hdcp mode/auth status api already exist in drm,
but hdcp topo info is not provided to drm.
Solution:
provide hdcp topo info for drm
Verify:
s7d
Test:
DRM-TX-126
Change-Id: Ifb8c4bafdccd66a4d81d73c4501d264c72ddc80e
Signed-off-by: hang cheng <hang.cheng@amlogic.com>
PD#SWPL-174549
Problem:
secure permission needs to be set for the pwm_clk register
related to voltage regulation. Relevant clk configurations
need to be stored in bl31. kernel configurations need to
be deleted.
Solution:
fix it
Verify:
s7
Change-Id: If3477940b33f4a612743cb1c5c58ce45e59a8505
Signed-off-by: yiting.deng <yiting.deng@amlogic.com>
PD#SWPL-174021
Problem:
screen anomaly in dma_buf and vf frame data composition using composer.
Solution:
1.clear src_vf after completing the composition of a frame of data.
2.fix the issue vicp cannot perform compositing on dma_buf.
Verify:
T3X
Change-Id: Ibf5492d823a1f1e8540feae7d8e275487a83710c
Signed-off-by: zhenteng.tian <zhenteng.tian@amlogic.com>
Rong Chen