Commit Graph

894 Commits

Author SHA1 Message Date
Chuan Liu dfb83bfa5b clk: s6: Update the axi_clk register bits definition [1/1]
PD#SWPL-183185

Problem:
VLSI updated the axi_clk register bits definition in the document.

Solution:
Fixed

Verify:
s6_bl201

Change-Id: Ibb3e5f9c5a8d7cfce58932568f26ae3dc80e4c3c
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
2024-08-29 19:03:07 +08:00
zhenteng.tian d328e39734 vc: notify frame display info to mediaproxy. [1/1]
PD#SWPL-177588

Problem:
video_composer need notify frame display info to mediaproxy

Solution:
notify frame display info to mediaproxy

Verify:
T5M

Change-Id: I5da4354b0fc2bb1097faa759572504b4036db713
Signed-off-by: zhenteng.tian <zhenteng.tian@amlogic.com>
2024-08-29 14:01:11 +08:00
can.zhang 3bec96db52 amvecm: disable hdr10plus openlinux [1/1]
PD#SWPL-181880

Problem:
hdr10plus func need open or not

Solution:
add code

Verify:
local

Change-Id: Idd08e9e7ea740ee9634367162b626eb0a1fd3b95
Signed-off-by: can.zhang <can.zhang@amlogic.com>
2024-08-29 11:24:52 +08:00
yuhua.lin 72f14f2de4 gdc: add uvswap for dewarp [1/1]
PD#SWPL-182203

Problem:
input format and output format are different
dewarp need to support swap U/V

Solution:
complete it

Verify:
s6

Change-Id: Ied820eca7f6690c707318317657c9e6d5edcbd89
Signed-off-by: yuhua.lin <yuhua.lin@amlogic.com>
2024-08-29 11:20:02 +08:00
xing.xu 146a889115 bandwidth: CF1 Single-frame Bandwidth Sampling [1/1]
PD#SWPL-179304

Problem:
Getting bandwidth data

Solution:
Getting bandwidth data

Verify:
s6.s7

Change-Id: I64e0bdc57456e6e17cb542b608eec5e952eac9ec
Signed-off-by: xing.xu <xing.xu@amlogic.com>
2024-08-29 10:41:27 +08:00
congyang.huang d3ce731a7a drm: optimize qms_brr_viclist function [1/1]
PD#SWPL-178271

Problem:
optimize qms brr viclist

Solution:
optimize get_modes function
vrr range equals hdmitx and lcd group freq divided by 100

Verify:
s5 t5m

Test:
DRM-OSD-45
DRM-OSD-47

Change-Id: I72d1a2588fb761f21b1b56039c1cb37d5b55ce60
Signed-off-by: congyang.huang <congyang.huang@amlogic.com>
2024-08-27 16:38:21 +08:00
zhou.han 41ccf69ed8 hdmitx: add edid_valid property [1/1]
PD#SWPL-99060

Problem:
Try to limit the external module directly r/w  the driver node.

Solution:
Add edid_valid property

Verify:
ohm

Test:
DRM-TX-20

Change-Id: I3bc300e0a8c0ec019d2ef10db976584140de4588
Signed-off-by: zhou.han <zhou.han@amlogic.com>
2024-08-22 14:44:14 +08:00
Jianxiong Pan baf674390d mm: set the special flags of cma allocation to filter printing of dmc. [1/1]
PD#SWPL-179075

Problem:
dmc monitor not filter cma allocation function by default.

Solution:
set the special migrate flags for dmc monitor.

Verify:
local.

Change-Id: Ie55a22685edc386c1e2af53a31269669e852d089
Signed-off-by: Jianxiong Pan <jianxiong.pan@amlogic.com>
2024-08-13 16:28:51 +08:00
qinghui.jiang 6bb7c56af3 amvecm: new ioctl cmd for get chip id [1/1]
PD#SWPL-175088

Problem:
new ioctl cmd for get chip id.

Solution:
add new ioctl cmd and flow.

Verify:
t982

Change-Id: If7384905cbad3b9ee2c770a837ba98cf4031cd34
Signed-off-by: qinghui.jiang <qinghui.jiang@amlogic.com>
2024-08-12 19:40:20 +08:00
hualing chen 47b810be18 media_proxy: CB2 move proxy to kernel common for 5.15. [1/8]
PD#SWPL-177051

Problem:
1  Di module can not call proxy api for 5.15.

Solution:
1  Move MediaProxy to kernel common for 5.15.

Verify:
t5m

Change-Id: I573f51392c809b77bf6a2e8194a4a3a451f1cc35
Signed-off-by: hualing chen <hualing.chen@amlogic.com>
2024-08-09 17:37:15 +08:00
Yongjie Zhu 81b8a5de32 dmaheap: add class and debug node [1/1]
PD#SWPL-176242

Problem:
dmaheap driver need support debug & class node
gralloc need use ioctl to get dmaheap info

Solution:
add class and debug node for dmaheap
add dmaheap ioctl for gralloc

Verify:
s7d

Change-Id: I60fa73f6c51bbb37fc81531e61b28ecd1fbf700f
Signed-off-by: Yongjie Zhu <yongjie.zhu@amlogic.com>
2024-08-09 17:23:47 +08:00
Chuan Liu d16057fbc8 clk: s6: Fix known issue [1/1]
PD#SWPL-179629

Problem:
1 Optimize driver file formats using automated tools.
2 vpu_clk adds a flag feature to prevent glitch when operating the
clock.
3 The naming of hifi_pll is inconsistent with the clkid style.
4 The latest documentation provided by vlsi has changed the sys_clk
definition for USB and PCIe.

Solution:
1 Optimized
2 vpu_clk added flag CLK_OPS_PARENT_ENABLE.
3 The clkid of hifi_pll is named CLKID_HIFI_PLL.
4 USB and PCIe sys_clk have been updated.

Verify:
s6_bl201

Change-Id: I4560f7bc6d42583d4e62d184c182bfe199cb6955
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
Signed-off-by: gongwei.chen <gongwei.chen@amlogic.com>
2024-08-08 16:38:05 +08:00
Rong Chen b6de9d689b mmc: add hs400 para save [1/1]
PD#SWPL-178572

Problem:
lack hs400 para save.

Solution:
add hs400 para save.

Verify:
S5

Change-Id: Ie363d3b303dd26c55b47778aa7753444be4af423
Signed-off-by: Rong Chen <rong.chen@amlogic.com>
2024-08-08 16:14:25 +08:00
ruofei.zhao 44a28a8e25 hdmitx: optimized hdmitx logs [2/2]
PD#SWPL-178894

Problem:
hdmitx logs non-normative

Solution:
optimized hdmitx logs

Verify:
S7D

Test:
DRM-TX-78

Change-Id: I49bf8a82fc34e12594f823843aa705d992a96640
Signed-off-by: ruofei.zhao <ruofei.zhao@amlogic.com>
2024-08-05 19:54:15 -07:00
xiangyang.yan fae282a51f S6: ethernet: googlecast wakeup [1/1]
PD#SWPL-179266

Problem:
googlecast wakeup

Solution:
add function googlecast wakeup

Verify:
bl201

Change-Id: I92b40055453e65df0a7735769acb590dc41f009c
Signed-off-by: xiangyang.yan <xiangyang.yan@amlogic.com>
2024-08-02 21:04:55 +08:00
zongdong.jiao 022c4ab2c4 hdmitx: add external plugin/out handler for eARC hpd [1/2]
PD#SWPL-177527
PD#SWPL-173088
PD#SWPL-173090

Problem:
The HPD signal may be come from HDMI HPD, but eARC has HPD
status from status bits

Solution:
Add reading EDID data in external plugin handler with mutex
No external plugout handler

Verify:
sc2, t7c

Test:
DRM-TX-38

Change-Id: I443e69aa6c8949a0d49df476108414431fd067d7
Signed-off-by: zongdong.jiao <zongdong.jiao@amlogic.com>
2024-08-02 19:19:45 +08:00
dian.shao 2785ce4b38 usb: s6 power optimise & misc [1/1]
PD#SWPL-177679

Problem:
S6 usb high power.
speed-drop usb devices.
u2phy disconnect, squelch & edgedrv cali

Solution:
Optimise suspend logic by holding usb controller reset bit,
usb controller comb reset bit, usb2_phy_reset_bit, usb3_phy_reset_bit
.Besides:
1. reset usb3_apb_reset_bit and leave it set then modify corresponding
static regs for low power.
2. off unused usb3phy digital 100M clk.
3. Some quirky devices take >2s to turn on Rterm and begin polling
after resume, which is seen in the new clean usb3 phy. This leads
to wait_for_connected timeout when resuming. Add XHCI_MISSING_CAS
for xHC to workaround by asserting warm reset at resume.

The speed-drop usb devices TX maybe unstable at insertion, leading to
CDR KI overload. Delay freq tracking start point by modifying fr_en
delay 1us->300us.

Modify params in driver & dts.

Verify:
BL201.

Change-Id: I4d6139ecad79e8582ada818338fcf53a1d66b131
Signed-off-by: dian.shao <dian.shao@amlogic.com>
2024-08-02 19:13:37 +08:00
Zhongfu Luo 4ae41ac092 efuse: S6: support read cali data [1/1]
PD#SWPL-176790

Problem:
S6: support read cali data

Solution:
S6: support read cali data

Verify:
S6 BL208

Change-Id: I3c3d7ba9f6b9ad619141ef0496b74c6648007d4a
Signed-off-by: Zhongfu Luo <zhongfu.luo@amlogic.com>
2024-08-01 17:29:36 +08:00
Hao Shi e0c575634d codec_mm: scatter owner register [1/1]
PD#SWPL-176775

Problem:
scatter keep size need expand for vdin

Solution:
scatter user can set scatter keep size
by register scatter owner.

Verify:
ohm

Change-Id: I4be8af6dff0454cda9191666ec48cd1e03464127
Signed-off-by: Hao Shi <hao.shi@amlogic.com>
2024-07-31 20:57:11 +08:00
zhikui.cui b13deaba77 NAND: adjust the mechanism of register partition and get rsv parameter [1/1]
PD#SWPL-177473

Problem:
1.uboot pass partitions by cmdline in default
2.uboot pass rsv parameter by kernel dtb

Solution:
1.first register partitions from cmdline rather than dts
2.first parse rsv parameter from dts rsv part table

Verify:
AW419-C308L-Socket #020

Change-Id: Id7cb010d012768d54602be37d35940efed367d6e
Signed-off-by: zhikui.cui <zhikui.cui@amlogic.com>
2024-07-30 11:09:15 +08:00
jinbing.zhu 9babc94a85 amvecm: s6 osd sharpness add load reg case type . [1/1]
PD#SWPL-176250

Problem:
osd sharpness add load reg case type

Solution:
osd sharpness add load reg case type

Verify:
s6

Change-Id: Ia3d12b9b859af62b5b94056bb16f44399e5681e9
Signed-off-by: jinbing.zhu <jinbing.zhu@amlogic.com>
2024-07-29 10:11:59 +08:00
Hao Shi ac1b38c235 amvdec: optimize vdec_info and vframe_counter_s [1/1]
PD#SWPL-168978
PD#SWPL-169060

Problem:
The size of vdec_info and vframe_counter_s of
the kernel and player are out of sync causing
tsplayer AMSTREAM_IOC_GET_MVDECINFO to fail.

Solution:
force structures to be byte-aligned

Verify:
t5w s4d

Change-Id: I14f2388d82288cbaa97dbc309a486f908bf597db
Signed-off-by: Hao Shi <hao.shi@amlogic.com>
2024-07-24 15:53:04 +08:00
yao liu a64e80c979 amdv: blank screen when osd3 on/off [1/1]
PD#SWPL-168062

Problem:
when osd3 on/off, core2a and core2c reset, but lut
updated fail; drm enable osd3 is one vsync earlier
then dv core2c

Solution:
1.drm set core2c lut when osd3 off->on
2.add force_toggle_once debug

Verify:
s5

Test:
s5

Change-Id: I5fe2a7abd1f4b887da5f32a655a24418fee86b64
Signed-off-by: yao liu <yao.liu@amlogic.com>
2024-07-22 19:07:26 +08:00
jinbing.zhu fad98367a6 amvecm: s6 osd sharpness bringup. [1/1]
PD#SWPL-173016

Problem:
s6 osd sharpness bringup

Solution:
s6 osd sharpness bringup

Verify:
s6

Change-Id: Ia15a81fee3bbad1302ce0253a6034ecf64555e6d
Signed-off-by: jinbing.zhu <jinbing.zhu@amlogic.com>
2024-07-18 17:20:02 +08:00
Pengcheng Chen f09cf578f5 vpp: add dejaggy enable when input is interlaced [1/1]
PD#SWPL-176085

Problem:
s6 inline aisr quality is poor

Solution:
vpp: add dejaggy enable when input is interlaced

Verify:
s6

Change-Id: I734869c0a38d101922f92ff0857f1077d717334b
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
2024-07-18 17:12:10 +08:00
jinbing.zhu 503f39e4cb amvecm: s6 kernel bringup [1/1]
PD#SWPL-173016

Problem:
s6 kernel bringup

Solution:
s6 kernel bringup

Verify:
s6

Change-Id: Ibeefcf768f79e5e9e86caf9a37f30d8151fec223
Signed-off-by: jinbing.zhu <jinbing.zhu@amlogic.com>
2024-07-18 08:12:38 +00:00
yao.zhou 8b9ce68999 camera: using v4l2 vdin [2/5]
PD#SWPL-176110

Problem:
bring up mipi sensor in s6

Solution:
1.add csi camera dts config
2.add csi driver support
3.the fe of mipi csi configure TVIN_SIG_STATUS_STABLE status defaultly
4.fix cfmt error
5.add VDIN_WORK_MD_V4L conditional statement
6.only modify s6_s905d5_bq201.dts s6_s905d5_bq208.dts s6_s905d5_bq209.dts
s6_s905x5_bl201.dts s6_s905x5_bl208.dts s6_s905x5_bl209.dts this time

Verify:
local

Change-Id: Ia54b8bf80dcbf26b3576e6eacc43b8f0082374b6
Signed-off-by: yao.zhou <yao.zhou@amlogic.com>
2024-07-18 10:30:07 +08:00
zongdong.jiao c53cd9ad8e hdmitx21: s6 need to support 1080p120hz [2/2]
PD#SWPL-176326

Problem:
s6 need to support 1080p120hz

Solution:
s6 need to support 1080p120hz

Verify:
S6

Test:
DRM-TX-130

Change-Id: I594f9671b36d3ea27c838bcf349a06cdcf2c707c
Signed-off-by: ruofei.zhao <ruofei.zhao@amlogic.com>
Signed-off-by: zongdong.jiao <zongdong.jiao@amlogic.com>
2024-07-17 22:05:09 +08:00
hang cheng c2d04ecc69 hdmitx: provide hdcp topo info for drm [1/1]
PD#SWPL-174927

Problem:
currently apk like netflix get hdcp status
from hdmitx driver instead of drm, need to
use unify interface of drm to get hdcp status.
hdcp mode/auth status api already exist in drm,
but hdcp topo info is not provided to drm.

Solution:
provide hdcp topo info for drm

Verify:
s7d

Test:
DRM-TX-126

Change-Id: Ifb8c4bafdccd66a4d81d73c4501d264c72ddc80e
Signed-off-by: hang cheng <hang.cheng@amlogic.com>
Signed-off-by: zongdong.jiao <zongdong.jiao@amlogic.com>
2024-07-17 22:04:20 +08:00
zongdong.jiao e1cc963dbf hdmitx: add hdcp1.4 key validation method [2/2]
PD#SWPL-175733

Problem:
need method to validate hdcp1.4 key

Solution:
add hdcp1.4 key validation method, check
aksv loaded from tee contains 20 zeros and 20 ones

Verify:
s7

Test:
DRM-TX-137

Change-Id: I46c6f38d74c61f3edccbb819da0c98f3f9085018
Signed-off-by: hang cheng <hang.cheng@amlogic.com>
Signed-off-by: zongdong.jiao <zongdong.jiao@amlogic.com>
2024-07-17 22:03:49 +08:00
Wenjie Qiao 5f15dac23c hdmitx: sync edid valid_mode check between uboot/kernel [2/2]
PD#SWPL-154107

Problem:
sync edid valid_mode check between uboot/kernel

Solution:
sync edid valid_mode check between uboot/kernel

Verify:
sc2/s5

Test:
DRM-TX-27, DRM-TX-29, DRM-TX-42, DRM-TX-44
DRM-TX-59, DRM-TX-70, DRM-TX-113

Change-Id: I2a708d55575e8d781380a34b397296589aa69d71
Signed-off-by: Wenjie Qiao <wenjie.qiao@amlogic.com>
Signed-off-by: zongdong.jiao <zongdong.jiao@amlogic.com>
2024-07-17 22:03:34 +08:00
zhou.han 37b56eb971 hdmitx: autotest fix [1/1]
PD#SWPL-161339

Problem:
EDID auto test fail

Solution:
print Source Physical Address

Verify:
ohm

Test:
autotest

Change-Id: I23cffa299418a7c79becfabb37c545baca4c6bda
Signed-off-by: zhou.han <zhou.han@amlogic.com>
2024-07-17 20:54:34 +08:00
zhiwei.zhang 789ffffbb2 camera: camera bringup on s6 [1/1]
PD#SWPL-173326

Problem:
add camera code for s6

Solution:
1. driver compatible for sm1 & s6;
2. for s6, add dts setting for squlech and deskew.
3. ov5640 add 640x480 rgb setting
4. 2 lanes & 4 lanes setting
5. enable mclk 24M using ioremap;

Verify:
local

Change-Id: I81dbaea3ddf46a4078d925ed64d230f6261a3f75
Signed-off-by: zhiwei.zhang <zhiwei.zhang@amlogic.com>
2024-07-17 20:03:22 +08:00
Long 5d3caa2b18 sdio: Optimize the throughput performance of sido wifi. [1/1]
PD#SWPL-174291

Problem:
need to improve sido wifi performance.

Solution:
Switch sdio source clock to DIV2 to provide bandwidth

Verify:
S7 ax201

Change-Id: I471517743851f381ec5d50aac3df9b26e5fe4aee
Signed-off-by: Long <long.yu@amlogic.com>
2024-07-17 19:18:59 +08:00
Long a1fe14d397 eMMC: Add method to sd clock sample cmd signal. [1/1]
PD#SWPL-143726

Problem:
Optimize the sampling method of cmd signal.

Solution:
sd_clk sample cmd response

Verify:
txhd2

Change-Id: Id851a1c81792f4267f766b4a9b904ebbffcc84aa
Signed-off-by: Long <long.yu@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
2024-07-17 19:18:52 +08:00
Long 2ef6cdc203 G12a: sdio and sdcard use time-sharing multiplexing. [1/1]
PD#SWPL-133324

Problem:
not support time-sharing multiplexing function.

Solution:
enable time-sharing multiplexing function.

Verify:
g12a_u212

Change-Id: I78392775c01b6b58aaf224b47537669bfe7737e1
Signed-off-by: Long <long.yu@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
2024-07-17 19:11:53 +08:00
jialong.jiang e0f25278a2 amdv: compilation failure problem. [1/1]
PD#SWPL-167603

Problem:
compilation failure problem.

Solution:
compilation failure problem.

Verify:
redi_wv4

Change-Id: Ia2077b1d4e2956a16a2c3a73d82bd5a0e20c78db
Signed-off-by: jialong.jiang <jialong.jiang@amlogic.com>
2024-07-17 16:58:02 +08:00
jialong.jiang d2c647b9c5 amdv: dolby signal flashes blue. [1/1]
PD#SWPL-158175

Problem:
the first dv signal did rgb2yuv by hdr core,
resulting in blue flashing.

Solution:
dv signal is not processed by rgb2yuv.

Verify:
t5m.

Change-Id: I886940deb9e943dd91c7426b7c71374fcba51b02
Signed-off-by: jialong.jiang <jialong.jiang@amlogic.com>
2024-07-17 16:42:35 +08:00
Junyi Zhao 385cd3c9fc pwm: fix hibernate clock reg [1/1]
PD#SWPL-170512

Problem:
clock config for hibernate

Solution:
add hibernate clock support

Verify:
T7C an400

Change-Id: I362522e91ea4e6f1aaa77216a686438d5876716e
Signed-off-by: Junyi Zhao <junyi.zhao@amlogic.com>
2024-07-17 13:26:39 +08:00
yiting.deng fadfc17306 clk: s7: update pwm_clk to secure [3/3]
PD#SWPL-174549

Problem:
secure permission needs to be set for the pwm_clk register
related to voltage regulation. Relevant clk configurations
need to be stored in bl31. kernel configurations need to
be deleted.

Solution:
fix it

Verify:
s7

Change-Id: If3477940b33f4a612743cb1c5c58ce45e59a8505
Signed-off-by: yiting.deng <yiting.deng@amlogic.com>
2024-07-17 00:10:46 +08:00
Hao Shi fcc4b649ce amvdec: optimize vdec_info and vframe_counter_s [2/2]
PD#SWPL-160457

Problem:
memcpy beyond individual struct members

Solution:
create a named mirror of an anonymous struct union

Verify:
sc2&sm1

Change-Id: If86c3581ac473bb8e4c2b2021bedcbe44ad406e2
Signed-off-by: Hao Shi <hao.shi@amlogic.com>
2024-07-15 14:30:00 +08:00
dian.shao db339fb46b usb: u3phy trim [1/1]
PD#SWPL-172978

Problem:
The u3phy needs trimming.

Solution:
Add driver codes.

Verify:
S6.

Change-Id: I159f6c74f78c8dbde2e180514f8ca215bab2ffa5
Signed-off-by: dian.shao <dian.shao@amlogic.com>
2024-07-14 17:57:46 +08:00
wenlong.zhang ed224cab12 drm: solution for gfcd odd size display abnormal [1/1]
PD#SWPL-171666

Problem:
gfcd source odd width display abnormal

Solution:
1.add workround for odd width input;
2.add gfcd odd size and gfcd global alpha enum;
3.move the gfcd block forward because it is more sensitive to timing;
4.optimizing gfcd afbc switches;
5.add gfcd div alpha setting;

Verify:
s7d

Test:
DRM-OSD-15

Change-Id: I83fda11948abd49abe021830a5acdd2607776094
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
2024-07-14 16:31:48 +08:00
Tao Zeng e10d75785a amfc: add support for s7d revb [1/1]
PD#SWPL-175588

Problem:
Need support s7d revb

Solution:
1, add clk set for revb;
2, use clk interface for clk set

Verify:
S7D bm201

Change-Id: I168a942f6796208dd4dff67a13f065be14a40f0c
Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
2024-07-14 16:25:15 +08:00
qiyao.zhou 73c0ca3be7 vicp: add enhanced security support for S6 [1/1]
PD#SWPL-174883

Problem:
add enhanced security support for S6

Solution:
add enhanced security support for S6

Verify:
s6

Change-Id: If4c88fecc4f0224402292c12a731494bda520499
Signed-off-by: qiyao.zhou <qiyao.zhou@amlogic.com>
2024-07-13 20:53:27 +08:00
dian.shao 31aa2ea19d usb: usb3.0 phy cfg update [1/1]
PD#SWPL-175043

Problem:
usb3.0 phy cfg update.

Solution:
update driver.

Verify:
bl201 & bl208

Change-Id: I72bde2600870859b4a2aa3f4c448f1f553890ee7
Signed-off-by: dian.shao <dian.shao@amlogic.com>
2024-07-13 20:53:27 +08:00
Chuan Liu b91b2a99f8 clk: s6: Fix mclk0 output exception [1/1]
PD#SWPL-172965

Problem:
1 The mclk0 power supply uses the power supply inside the mclk_pll, so the
mclk0 output must ensure that mclk_pll is also enabled.
mclk_pll_clk can output clocks mclk_pll_src and fclk50m. The existence of
these two clock sources is meaningless.
2 If mclk0 uses mclk_pll as the clock source, div2 must be selected for
the clock of the later stage; otherwise, the output clock waveform of
mclk0 is abnormal.

Solution:
1 Delete the mclk_pll_src and fclk50m clock sources and set mclk_pll_clk
as the clock source of mclk0.
2 mclk0 selects div2 by default.

Verify:
s6_bl201

Change-Id: I9a8e3e1616b4c9b3b9c86990f86dc337f9f9c877
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
2024-07-13 19:17:21 +08:00
Chuan Liu 05e0830f0f clk: s6: Fix some parent issue with sys_clk [1/1]
PD#SWPL-172965

Problem:
1 All I2C Masters (i2c_m_a-f) in a chip share an APB bus, which is
provided by sys_i2c_m_a. PWM is designed with a similar architecture, and
the APB bus of PWM is clock provided by sys_pwm_a.
2 The CLKID definition of smart card is inconsistent.

Solution:
1 The parent of sys_i2c_m_b-f is set to sys_i2c_m_a.
2 The parent of sys_pwm_b-i is set to sys_pwm_a.
3 CLKID_SC_DIV was renamed CLKID_SC.

Verify:
s6_bl201

Change-Id: I94482625f3a9fe387113edce21ed16e9dc63a074
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
2024-07-13 19:16:40 +08:00
hongyu.chen1 4f02b1415f S6: add adapt power domain config. [3/3]
PD#SWPL-174348

Problem:
adapt need mempd control.

Solution:
add adapt config in kernel.

Verify:
bl201

Change-Id: Ibf2abce9524480b657a7d271215a0eb87aaeb6d4
Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com>
2024-07-13 19:16:37 +08:00
Doosan Baek 107fe326b2 kt: s6 kl/kt bringup [1/1]
PD#SWPL-169992

Problem:
s6 kt/kl kernel bringup
need multi2 algo type

Solution:
s6 kt/kl kernel bringup
add multi2 algo type

Verify:
s6

Change-Id: I0622e86c05194784934f08aa0dd5d38b1239857e
Signed-off-by: Doosan Baek <doosan.baek@amlogic.com>
2024-07-13 19:16:37 +08:00