PD#SWPL-177527
PD#SWPL-173088
PD#SWPL-173090
Problem:
The HPD signal may be come from HDMI HPD, but eARC has HPD
status from status bits
Solution:
Add reading EDID data in external plugin handler with mutex
No external plugout handler
Verify:
sc2, t7c
Test:
DRM-TX-38
Change-Id: I443e69aa6c8949a0d49df476108414431fd067d7
Signed-off-by: zongdong.jiao <zongdong.jiao@amlogic.com>
PD#SWPL-177679
Problem:
S6 usb high power.
speed-drop usb devices.
u2phy disconnect, squelch & edgedrv cali
Solution:
Optimise suspend logic by holding usb controller reset bit,
usb controller comb reset bit, usb2_phy_reset_bit, usb3_phy_reset_bit
.Besides:
1. reset usb3_apb_reset_bit and leave it set then modify corresponding
static regs for low power.
2. off unused usb3phy digital 100M clk.
3. Some quirky devices take >2s to turn on Rterm and begin polling
after resume, which is seen in the new clean usb3 phy. This leads
to wait_for_connected timeout when resuming. Add XHCI_MISSING_CAS
for xHC to workaround by asserting warm reset at resume.
The speed-drop usb devices TX maybe unstable at insertion, leading to
CDR KI overload. Delay freq tracking start point by modifying fr_en
delay 1us->300us.
Modify params in driver & dts.
Verify:
BL201.
Change-Id: I4d6139ecad79e8582ada818338fcf53a1d66b131
Signed-off-by: dian.shao <dian.shao@amlogic.com>
PD#SWPL-176790
Problem:
S6: support read cali data
Solution:
S6: support read cali data
Verify:
S6 BL208
Change-Id: I3c3d7ba9f6b9ad619141ef0496b74c6648007d4a
Signed-off-by: Zhongfu Luo <zhongfu.luo@amlogic.com>
PD#SWPL-176775
Problem:
scatter keep size need expand for vdin
Solution:
scatter user can set scatter keep size
by register scatter owner.
Verify:
ohm
Change-Id: I4be8af6dff0454cda9191666ec48cd1e03464127
Signed-off-by: Hao Shi <hao.shi@amlogic.com>
PD#SWPL-168978
PD#SWPL-169060
Problem:
The size of vdec_info and vframe_counter_s of
the kernel and player are out of sync causing
tsplayer AMSTREAM_IOC_GET_MVDECINFO to fail.
Solution:
force structures to be byte-aligned
Verify:
t5w s4d
Change-Id: I14f2388d82288cbaa97dbc309a486f908bf597db
Signed-off-by: Hao Shi <hao.shi@amlogic.com>
PD#SWPL-168062
Problem:
when osd3 on/off, core2a and core2c reset, but lut
updated fail; drm enable osd3 is one vsync earlier
then dv core2c
Solution:
1.drm set core2c lut when osd3 off->on
2.add force_toggle_once debug
Verify:
s5
Test:
s5
Change-Id: I5fe2a7abd1f4b887da5f32a655a24418fee86b64
Signed-off-by: yao liu <yao.liu@amlogic.com>
PD#SWPL-176326
Problem:
s6 need to support 1080p120hz
Solution:
s6 need to support 1080p120hz
Verify:
S6
Test:
DRM-TX-130
Change-Id: I594f9671b36d3ea27c838bcf349a06cdcf2c707c
Signed-off-by: ruofei.zhao <ruofei.zhao@amlogic.com>
Signed-off-by: zongdong.jiao <zongdong.jiao@amlogic.com>
PD#SWPL-174927
Problem:
currently apk like netflix get hdcp status
from hdmitx driver instead of drm, need to
use unify interface of drm to get hdcp status.
hdcp mode/auth status api already exist in drm,
but hdcp topo info is not provided to drm.
Solution:
provide hdcp topo info for drm
Verify:
s7d
Test:
DRM-TX-126
Change-Id: Ifb8c4bafdccd66a4d81d73c4501d264c72ddc80e
Signed-off-by: hang cheng <hang.cheng@amlogic.com>
Signed-off-by: zongdong.jiao <zongdong.jiao@amlogic.com>
PD#SWPL-174291
Problem:
need to improve sido wifi performance.
Solution:
Switch sdio source clock to DIV2 to provide bandwidth
Verify:
S7 ax201
Change-Id: I471517743851f381ec5d50aac3df9b26e5fe4aee
Signed-off-by: Long <long.yu@amlogic.com>
PD#SWPL-158175
Problem:
the first dv signal did rgb2yuv by hdr core,
resulting in blue flashing.
Solution:
dv signal is not processed by rgb2yuv.
Verify:
t5m.
Change-Id: I886940deb9e943dd91c7426b7c71374fcba51b02
Signed-off-by: jialong.jiang <jialong.jiang@amlogic.com>
PD#SWPL-174549
Problem:
secure permission needs to be set for the pwm_clk register
related to voltage regulation. Relevant clk configurations
need to be stored in bl31. kernel configurations need to
be deleted.
Solution:
fix it
Verify:
s7
Change-Id: If3477940b33f4a612743cb1c5c58ce45e59a8505
Signed-off-by: yiting.deng <yiting.deng@amlogic.com>
PD#SWPL-160457
Problem:
memcpy beyond individual struct members
Solution:
create a named mirror of an anonymous struct union
Verify:
sc2&sm1
Change-Id: If86c3581ac473bb8e4c2b2021bedcbe44ad406e2
Signed-off-by: Hao Shi <hao.shi@amlogic.com>
PD#SWPL-175588
Problem:
Need support s7d revb
Solution:
1, add clk set for revb;
2, use clk interface for clk set
Verify:
S7D bm201
Change-Id: I168a942f6796208dd4dff67a13f065be14a40f0c
Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
PD#SWPL-172965
Problem:
1 The mclk0 power supply uses the power supply inside the mclk_pll, so the
mclk0 output must ensure that mclk_pll is also enabled.
mclk_pll_clk can output clocks mclk_pll_src and fclk50m. The existence of
these two clock sources is meaningless.
2 If mclk0 uses mclk_pll as the clock source, div2 must be selected for
the clock of the later stage; otherwise, the output clock waveform of
mclk0 is abnormal.
Solution:
1 Delete the mclk_pll_src and fclk50m clock sources and set mclk_pll_clk
as the clock source of mclk0.
2 mclk0 selects div2 by default.
Verify:
s6_bl201
Change-Id: I9a8e3e1616b4c9b3b9c86990f86dc337f9f9c877
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-172965
Problem:
1 All I2C Masters (i2c_m_a-f) in a chip share an APB bus, which is
provided by sys_i2c_m_a. PWM is designed with a similar architecture, and
the APB bus of PWM is clock provided by sys_pwm_a.
2 The CLKID definition of smart card is inconsistent.
Solution:
1 The parent of sys_i2c_m_b-f is set to sys_i2c_m_a.
2 The parent of sys_pwm_b-i is set to sys_pwm_a.
3 CLKID_SC_DIV was renamed CLKID_SC.
Verify:
s6_bl201
Change-Id: I94482625f3a9fe387113edce21ed16e9dc63a074
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-172976
Problem:
add aocpu alive detection and mailbox retry mechanism to
avoid mailbox message lost due to aocpu crash or mailbox
signal lost occasionally
Solution:
add aocpu alive detection and mailbox retry mechanism
Verify:
S6-BL201
Change-Id: Ia90380a7ead99e7f00eb82bcde02201f4636dd30
Signed-off-by: Yao Jie <jie.yao@amlogic.com>
PD#SWPL-172965
Problem:
1 mclk_pll and dspa_clk output are incorrect
2 mmc failed to insmod
3 Lost sys_i2c_s_a
Solution:
1 Update the table for mclk_pll
2 Update the parent table of the dspa
3 Ignore initializing gp0_pll
4 Added sys_i2c_s_a
Verify:
s6_bl201
Change-Id: I23586623d908ef871e178acf0da8883aabc12fc9
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-158289
Problem:
1 The register corresponding to oscin was updated;
2 Put some of the key clocks into bl31 for processing.
Solution:
fixed
Verify:
pxp
Change-Id: Ie5ea8b6c507ce136ba397e8e54362b72f05cf45c
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
PD#SWPL-153862
Problem:
s6 need power domain support.
Solution:
add power domain in kernel.
Verify:
pxp
Change-Id: I5ba46225cb08a4a92d43fe25d7f6385d65bf6efb
Signed-off-by: hongyu.chen1 <hongyu.chen1@amlogic.com>
ruofei.zhao